MX9700879A - Montaje electronico de multiples capas que utiliza una composicion sinterizable y metodo relacionado de formacion. - Google Patents

Montaje electronico de multiples capas que utiliza una composicion sinterizable y metodo relacionado de formacion.

Info

Publication number
MX9700879A
MX9700879A MX9700879A MX9700879A MX9700879A MX 9700879 A MX9700879 A MX 9700879A MX 9700879 A MX9700879 A MX 9700879A MX 9700879 A MX9700879 A MX 9700879A MX 9700879 A MX9700879 A MX 9700879A
Authority
MX
Mexico
Prior art keywords
composition
forming
electronic assembly
related method
multilayer electronic
Prior art date
Application number
MX9700879A
Other languages
English (en)
Other versions
MXPA97000879A (es
Inventor
Craig N Ernsberger
Sarah E Leach
Kathleen E Allen
Ralph J Wenzel
Richard C Meyer
Original Assignee
Cts Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cts Corp filed Critical Cts Corp
Publication of MXPA97000879A publication Critical patent/MXPA97000879A/es
Publication of MX9700879A publication Critical patent/MX9700879A/es

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20Conductive material dispersed in non-conductive organic material
    • H01B1/22Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49883Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing organic materials or pastes, e.g. for thick films
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/0959Plated through-holes or plated blind vias filled with insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1131Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1453Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Ceramic Capacitors (AREA)
  • Thermistors And Varistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Conductive Materials (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Paints Or Removers (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

Se describen montajes electronicos que comprenden una composicion sinterizable. La composicion sinteriza reactivamente y/o no reactivamente, durante el ciclo de cura de laminacion del montaje. La composicion generalmente comprende (i) al menos un material en fase de partículas de alto punto fusion, (ii) al menos un material de bajo punto de fusion y (iii) una porcion orgánica que comprende una resina y un agente de entrelazamiento.
MX9700879A 1996-02-28 1997-02-04 Montaje electronico de multiples capas que utiliza una composicion sinterizable y metodo relacionado de formacion. MX9700879A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60817896A 1996-02-28 1996-02-28
US608178 1996-02-28

Publications (2)

Publication Number Publication Date
MXPA97000879A MXPA97000879A (es) 1998-04-01
MX9700879A true MX9700879A (es) 1998-04-30

Family

ID=24435395

Family Applications (1)

Application Number Title Priority Date Filing Date
MX9700879A MX9700879A (es) 1996-02-28 1997-02-04 Montaje electronico de multiples capas que utiliza una composicion sinterizable y metodo relacionado de formacion.

Country Status (7)

Country Link
EP (1) EP0793405A3 (es)
JP (1) JPH107933A (es)
AU (1) AU1487897A (es)
BR (1) BR9701068A (es)
CA (1) CA2196024A1 (es)
MX (1) MX9700879A (es)
TW (1) TW342583B (es)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057449U (ja) * 1983-09-28 1985-04-22 アルプス電気株式会社 二輪車用方向指示器の表示自動解除装置
EP1009206A3 (en) 1998-12-02 2003-01-15 Ajinomoto Co., Inc. Method of vacuum-laminating adhesive film
JP2001230551A (ja) * 2000-02-14 2001-08-24 Ibiden Co Ltd プリント配線板並びに多層プリント配線板及びその製造方法
US6319811B1 (en) 2000-02-22 2001-11-20 Scott Zimmerman Bond ply structure and associated process for interconnection of circuit layer pairs with conductive inks
JP2002064270A (ja) * 2000-08-17 2002-02-28 Matsushita Electric Ind Co Ltd 回路基板とその製造方法
JP3473601B2 (ja) * 2000-12-26 2003-12-08 株式会社デンソー プリント基板およびその製造方法
JP3867523B2 (ja) * 2000-12-26 2007-01-10 株式会社デンソー プリント基板およびその製造方法
JP3803058B2 (ja) * 2001-12-11 2006-08-02 信越化学工業株式会社 熱伝導性シリコーン組成物、その硬化物及び敷設方法並びにそれを用いた半導体装置の放熱構造体
US7528006B2 (en) * 2005-06-30 2009-05-05 Intel Corporation Integrated circuit die containing particle-filled through-silicon metal vias with reduced thermal expansion
JP4844294B2 (ja) * 2006-08-30 2011-12-28 パナソニック株式会社 複合配線基板
US7791175B2 (en) 2007-12-20 2010-09-07 Mosaid Technologies Incorporated Method for stacking serially-connected integrated circuits and multi-chip device made from same
US8399973B2 (en) 2007-12-20 2013-03-19 Mosaid Technologies Incorporated Data storage and stackable configurations
JP5217639B2 (ja) 2008-05-30 2013-06-19 富士通株式会社 コア基板およびプリント配線板
JP5217640B2 (ja) 2008-05-30 2013-06-19 富士通株式会社 プリント配線板の製造方法およびプリント基板ユニットの製造方法
JP2009290124A (ja) 2008-05-30 2009-12-10 Fujitsu Ltd プリント配線板
EP2408285B1 (en) * 2009-03-12 2018-11-14 Tatsuta Electric Wire & Cable Co., Ltd. Method of manufacturing multilayer printed wiring board and multilayer wiring board obtained thereby
JP4713682B1 (ja) 2010-02-25 2011-06-29 パナソニック株式会社 多層配線基板、及び多層配線基板の製造方法
JP4616927B1 (ja) 2010-02-25 2011-01-19 パナソニック株式会社 配線基板、配線基板の製造方法、及びビアペースト
CN104619742B (zh) 2012-07-03 2016-08-17 3M创新有限公司 制备结构化的复合粘合剂制品的方法
EP2923366B1 (en) * 2012-11-26 2017-09-20 Kemet Electronics Corporation Leadless multi-layered ceramic capacitor stacks
JP6374298B2 (ja) * 2014-10-31 2018-08-15 千住金属工業株式会社 フラックス及びフラックスを用いた接合方法
US9831201B2 (en) 2015-03-11 2017-11-28 Guy F. Burgess Methods for forming pillar bumps on semiconductor wafers
EP3284326A4 (en) * 2015-04-13 2019-04-24 Printcb Ltd. PRINTING MULTI-LAYER CIRCUITS
WO2018105125A1 (ja) * 2016-12-09 2018-06-14 日立化成株式会社 組成物、接着剤、焼結体、接合体及び接合体の製造方法
US20200063008A1 (en) * 2016-12-09 2020-02-27 Hitachi Chemical Company, Ltd. Composition, adhesive, sintered body, joined body, and method of producing joined body
CN110050036A (zh) * 2016-12-09 2019-07-23 日立化成株式会社 组合物、粘接剂、烧结体、接合体和接合体的制造方法
KR20200131264A (ko) 2018-03-15 2020-11-23 프린트씨비 리미티드 2 성분 인쇄 가능한 전도성 조성물
WO2020017048A1 (ja) * 2018-07-20 2020-01-23 日立化成株式会社 組成物、接合材料、焼結体、接合体及び接合体の製造方法
KR102537710B1 (ko) * 2021-05-28 2023-05-31 (주)티에스이 일괄 접합 방식의 다층 회로기판 및 그 제조 방법
US20230187337A1 (en) * 2021-12-14 2023-06-15 Karumbu Meyyappan Flexible liquid metal connection device and method

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JPH07179832A (ja) * 1993-12-24 1995-07-18 Toyota Motor Corp 導電性接着剤

Also Published As

Publication number Publication date
JPH107933A (ja) 1998-01-13
BR9701068A (pt) 1998-12-15
CA2196024A1 (en) 1997-08-28
TW342583B (en) 1998-10-11
AU1487897A (en) 1997-09-11
EP0793405A2 (en) 1997-09-03
EP0793405A3 (en) 1998-12-02

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