MX9504612A - Encuadre vertical para video entrelazado. - Google Patents

Encuadre vertical para video entrelazado.

Info

Publication number
MX9504612A
MX9504612A MX9504612A MX9504612A MX9504612A MX 9504612 A MX9504612 A MX 9504612A MX 9504612 A MX9504612 A MX 9504612A MX 9504612 A MX9504612 A MX 9504612A MX 9504612 A MX9504612 A MX 9504612A
Authority
MX
Mexico
Prior art keywords
synchronizing frequency
frequency signal
vertical
horizontal
supplied
Prior art date
Application number
MX9504612A
Other languages
English (en)
Inventor
Robert Karoly Diamant
Original Assignee
Rca Thomson Licensing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Thomson Licensing Corp filed Critical Rca Thomson Licensing Corp
Publication of MX9504612A publication Critical patent/MX9504612A/es

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/0122—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal the input and the output signals having different aspect ratios
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Graphics (AREA)
  • Details Of Television Scanning (AREA)
  • Synchronizing For Television (AREA)
  • Color Television Systems (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

Un sistema de encuadre vertical incluye: una fuente (12) de las señales respectivas que tienen una frecuencia de sincronizacion vertical y una frecuencia de sincronizacion horizontal; otra fuente (24) de señal que tiene un multiplo (2fH) de la frecuencia de sincronizacion horizontal; un despliegue de video (30) que tiene un modo de campo entrelazado de operacion; un circuito de control de despliegue visual horizontal (28) acoplado al despliegue de video y que responde a la señal de frecuencia de sincronizacion horizontal suministrada; y, un circuito de control de despliegue visual vertical (22) acoplado al despliegue de video y que responde a una segunda señal de frecuencia de sincronizacion vertical (VOUT). El sistema se caracteriza por un circuito de retardo de fase digital (14), que responde a la señal de frecuencia de sincronizacion horizontal multiple suministrada, a la señal de frecuencia de sincronizacion vertical suministrada y a una señal de control de encuadre (PCS), que tiene como una salida la segunda señal de frecuencia de sincronizacion vertical (VOUT) retardada en fase con relacion a la señal de frecuencia de sincronizacion vertical suministrada mediante cualquiera de una pluralidad de retardos que difieren en los incrementos de una duracion que corresponde a los intervalos de media línea horizontal.
MX9504612A 1994-11-02 1995-11-01 Encuadre vertical para video entrelazado. MX9504612A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/333,181 US5574508A (en) 1994-11-02 1994-11-02 Vertical panning for interlaced video

Publications (1)

Publication Number Publication Date
MX9504612A true MX9504612A (es) 1997-05-31

Family

ID=23301676

Family Applications (1)

Application Number Title Priority Date Filing Date
MX9504612A MX9504612A (es) 1994-11-02 1995-11-01 Encuadre vertical para video entrelazado.

Country Status (9)

Country Link
US (1) US5574508A (es)
EP (1) EP0711071B1 (es)
JP (1) JP3703544B2 (es)
KR (1) KR100393458B1 (es)
CN (1) CN1134974C (es)
DE (1) DE69525709T2 (es)
MX (1) MX9504612A (es)
MY (1) MY113091A (es)
TW (1) TW285808B (es)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3123358B2 (ja) * 1994-09-02 2001-01-09 株式会社日立製作所 ディスプレイ装置
JP3488313B2 (ja) * 1995-04-21 2004-01-19 ソニー株式会社 映像信号処理装置および合成画面投影装置
DE69731505T2 (de) * 1996-06-19 2005-10-20 Matsushita Electric Industrial Co., Ltd., Kadoma Fernsehempfänger
JP2000092409A (ja) * 1998-09-10 2000-03-31 Sony Corp 映像表示装置
US6456745B1 (en) * 1998-09-16 2002-09-24 Push Entertaiment Inc. Method and apparatus for re-sizing and zooming images by operating directly on their digital transforms
DE10026739B4 (de) * 2000-05-30 2006-10-19 Micronas Gmbh Verfahren und Vorrichtung zur Phasenkorrektur eines vertikal verzerrten digitalen Bilds
US6930524B2 (en) * 2001-10-09 2005-08-16 Micron Technology, Inc. Dual-phase delay-locked loop circuit and method
US6759911B2 (en) 2001-11-19 2004-07-06 Mcron Technology, Inc. Delay-locked loop circuit and method using a ring oscillator and counter-based delay
US7262806B2 (en) * 2001-11-21 2007-08-28 Broadcom Corporation System and method for aligned compression of interlaced video
US6621316B1 (en) 2002-06-20 2003-09-16 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a counter and reduced size bi-directional delay line
US6727740B2 (en) * 2002-08-29 2004-04-27 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals
US6937076B2 (en) * 2003-06-11 2005-08-30 Micron Technology, Inc. Clock synchronizing apparatus and method using frequency dependent variable delay
TWI268473B (en) * 2004-11-04 2006-12-11 Realtek Semiconductor Corp Display controlling device and controlling method
US7130226B2 (en) * 2005-02-09 2006-10-31 Micron Technology, Inc. Clock generating circuit with multiple modes of operation
JP2009147831A (ja) * 2007-12-17 2009-07-02 Victor Co Of Japan Ltd 画像伝送装置及びワイヤレス画像受信装置
CN107645627B (zh) * 2016-07-20 2020-08-11 南京造币有限公司 一种多相机同步控制装置
CN112927648A (zh) * 2019-12-06 2021-06-08 西安诺瓦星云科技股份有限公司 显示控制方法及装置、模组控制卡和led显示屏

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3793483A (en) * 1972-11-24 1974-02-19 N Bushnell Video image positioning control system for amusement device
US3827041A (en) * 1973-08-14 1974-07-30 Teletype Corp Display apparatus with visual segment indicia
JPS6016777A (ja) * 1983-07-08 1985-01-28 Victor Co Of Japan Ltd 文字信号発生装置
CA1258912A (en) * 1986-11-20 1989-08-29 Stephen J. King Interactive real-time video processor with zoom, pan and scroll capability
GB9012326D0 (en) * 1990-06-01 1990-07-18 Thomson Consumer Electronics Wide screen television
US5262864A (en) * 1992-07-10 1993-11-16 Thomson Consumer Electronics, Inc. Frame based vertical panning system
US5345152A (en) * 1993-07-14 1994-09-06 Thomson Consumer Electronics, Inc. Vertical deflection S-correction with picture height compensation

Also Published As

Publication number Publication date
KR100393458B1 (ko) 2003-10-17
CN1132974A (zh) 1996-10-09
EP0711071B1 (en) 2002-03-06
CN1134974C (zh) 2004-01-14
TW285808B (es) 1996-09-11
KR960020469A (ko) 1996-06-17
DE69525709T2 (de) 2002-08-14
JPH08214179A (ja) 1996-08-20
MY113091A (en) 2001-11-30
US5574508A (en) 1996-11-12
DE69525709D1 (de) 2002-04-11
EP0711071A1 (en) 1996-05-08
JP3703544B2 (ja) 2005-10-05

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