MX369485B - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents

Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Info

Publication number
MX369485B
MX369485B MX2016003229A MX2016003229A MX369485B MX 369485 B MX369485 B MX 369485B MX 2016003229 A MX2016003229 A MX 2016003229A MX 2016003229 A MX2016003229 A MX 2016003229A MX 369485 B MX369485 B MX 369485B
Authority
MX
Mexico
Prior art keywords
parity
data processing
ldpc
bits
matrix
Prior art date
Application number
MX2016003229A
Other languages
English (en)
Other versions
MX2016003229A (es
Inventor
Shinohara Yuji
Yamamoto Makiko
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MX2016003229A publication Critical patent/MX2016003229A/es
Publication of MX369485B publication Critical patent/MX369485B/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033—Theoretical methods to calculate these checking codes
    • H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Abstract

La tecnología presente se relaciona con un dispositivo de procesamiento de datos y a un método de procesamiento de datos de modo que el código LDPC es proporcionado con una buena velocidad de error de bits. Un codificador LDPC codificado por un código LDPC cuya longitud de código es de 16200 bits y una velocidad es de 10/15. El código LDCP incluye los bits de información y los bits de paridad. Una matriz H de comprobación o verificación de paridad incluye una parte de la matriz de información que corresponde a los bits de información del código LDPC y una parte de la matriz de paridad que corresponde a los bits de paridad. La parte de la matriz de información de la matriz H de comprobación de paridad es representada por una tabla de valor inicial de la matriz de comprobación de paridad indicando la posición de un elemento 1 de la parte de la matriz de información para cada una de las 360 columnas. La tecnología presente es aplicable a un caso en el cual la codificación LDPC y la decodificación LDPC son realizadas.
MX2016003229A 2013-09-20 2014-09-05 Dispositivo de procesamiento de datos y metodo de procesamiento de datos. MX369485B (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013196090 2013-09-20
PCT/JP2014/073469 WO2015041074A1 (ja) 2013-09-20 2014-09-05 データ処理装置、及びデータ処理方法

Publications (2)

Publication Number Publication Date
MX2016003229A MX2016003229A (es) 2016-06-07
MX369485B true MX369485B (es) 2019-11-11

Family

ID=52688725

Family Applications (2)

Application Number Title Priority Date Filing Date
MX2016003229A MX369485B (es) 2013-09-20 2014-09-05 Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019013223A MX2019013223A (es) 2013-09-20 2016-03-11 Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Family Applications After (1)

Application Number Title Priority Date Filing Date
MX2019013223A MX2019013223A (es) 2013-09-20 2016-03-11 Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Country Status (8)

Country Link
US (2) US10277257B2 (es)
EP (1) EP3048734B1 (es)
JP (1) JP6364417B2 (es)
KR (3) KR101929296B1 (es)
CN (1) CN105531935B (es)
CA (1) CA2923596C (es)
MX (2) MX369485B (es)
WO (1) WO2015041074A1 (es)

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Also Published As

Publication number Publication date
CN105531935B (zh) 2020-03-31
KR20180133948A (ko) 2018-12-17
US20160204806A1 (en) 2016-07-14
WO2015041074A1 (ja) 2015-03-26
KR102113943B1 (ko) 2020-05-21
CN105531935A (zh) 2016-04-27
KR101929296B1 (ko) 2018-12-17
EP3048734A1 (en) 2016-07-27
MX2019013223A (es) 2020-01-15
EP3048734A4 (en) 2017-05-10
JPWO2015041074A1 (ja) 2017-03-02
US10277257B2 (en) 2019-04-30
CA2923596C (en) 2021-03-30
KR101752331B1 (ko) 2017-06-29
KR20160060028A (ko) 2016-05-27
CA2923596A1 (en) 2015-03-26
EP3048734B1 (en) 2019-01-02
MX2016003229A (es) 2016-06-07
JP6364417B2 (ja) 2018-07-25
KR20170077269A (ko) 2017-07-05
US20190215020A1 (en) 2019-07-11
US10951241B2 (en) 2021-03-16

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