MX350915B - Terminacion de comando de averiguacion en memorias flash. - Google Patents
Terminacion de comando de averiguacion en memorias flash.Info
- Publication number
- MX350915B MX350915B MX2016002983A MX2016002983A MX350915B MX 350915 B MX350915 B MX 350915B MX 2016002983 A MX2016002983 A MX 2016002983A MX 2016002983 A MX2016002983 A MX 2016002983A MX 350915 B MX350915 B MX 350915B
- Authority
- MX
- Mexico
- Prior art keywords
- transfer request
- register
- request completion
- bit
- flash memories
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2206/00—Indexing scheme related to dedicated interfaces for computers
- G06F2206/10—Indexing scheme related to storage interfaces for computers, indexing schema related to group G06F3/06
- G06F2206/1014—One time programmable [OTP] memory, e.g. PROM, WORM
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Security & Cryptography (AREA)
- Information Transfer Systems (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Retry When Errors Occur (AREA)
- Read Only Memory (AREA)
- Executing Machine-Instructions (AREA)
- Bus Control (AREA)
- Communication Control (AREA)
- Telephone Function (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Memory System (AREA)
- Storage Device Security (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361875907P | 2013-09-10 | 2013-09-10 | |
| US14/467,404 US9348537B2 (en) | 2013-09-10 | 2014-08-25 | Ascertaining command completion in flash memories |
| PCT/US2014/052667 WO2015038325A1 (en) | 2013-09-10 | 2014-08-26 | Ascertaining command completion in flash memories |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| MX2016002983A MX2016002983A (es) | 2016-06-02 |
| MX350915B true MX350915B (es) | 2017-09-25 |
Family
ID=52626699
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2016002983A MX350915B (es) | 2013-09-10 | 2014-08-26 | Terminacion de comando de averiguacion en memorias flash. |
Country Status (18)
| Country | Link |
|---|---|
| US (1) | US9348537B2 (enExample) |
| EP (2) | EP4177764A1 (enExample) |
| JP (2) | JP6173603B2 (enExample) |
| KR (1) | KR101754545B1 (enExample) |
| CN (1) | CN105556497B (enExample) |
| AU (1) | AU2014318238B2 (enExample) |
| BR (1) | BR112016005368B1 (enExample) |
| CA (1) | CA2920748C (enExample) |
| CL (1) | CL2016000555A1 (enExample) |
| MX (1) | MX350915B (enExample) |
| MY (1) | MY177952A (enExample) |
| NZ (1) | NZ717400A (enExample) |
| PH (1) | PH12016500339B1 (enExample) |
| RU (1) | RU2016107810A (enExample) |
| SA (1) | SA516370693B1 (enExample) |
| SG (1) | SG11201600764RA (enExample) |
| TW (1) | TWI570568B (enExample) |
| WO (1) | WO2015038325A1 (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9690720B2 (en) * | 2014-06-03 | 2017-06-27 | Qualcomm Incorporated | Providing command trapping using a request filter circuit in an input/output virtualization (IOV) host controller (HC) (IOV-HC) of a flash-memory-based storage device |
| US9881680B2 (en) | 2014-06-03 | 2018-01-30 | Qualcomm Incorporated | Multi-host power controller (MHPC) of a flash-memory-based storage device |
| US9632953B2 (en) * | 2014-06-03 | 2017-04-25 | Qualcomm Incorporated | Providing input/output virtualization (IOV) by mapping transfer requests to shared transfer requests lists by IOV host controllers |
| RU2610681C1 (ru) * | 2016-02-18 | 2017-02-14 | Акционерное общество "Научно-исследовательский институт вычислительных комплексов им. М.А. Карцева" (АО "НИИВК им. М.А. Карцева") | Способ сохранения информации в аварийных регистраторах |
| KR20180045103A (ko) * | 2016-10-24 | 2018-05-04 | 삼성전자주식회사 | 적응형 인터럽트를 생성하는 데이터 저장 장치 및 그것의 동작 방법 |
| US10452278B2 (en) | 2017-03-24 | 2019-10-22 | Western Digital Technologies, Inc. | System and method for adaptive early completion posting using controller memory buffer |
| US10725835B2 (en) | 2017-05-03 | 2020-07-28 | Western Digital Technologies, Inc. | System and method for speculative execution of commands using a controller memory buffer |
| WO2018175059A1 (en) * | 2017-03-24 | 2018-09-27 | Western Digital Technologies, Inc. | System and method for speculative execution of commands using the controller memory buffer |
| US10509569B2 (en) | 2017-03-24 | 2019-12-17 | Western Digital Technologies, Inc. | System and method for adaptive command fetch aggregation |
| US10466903B2 (en) | 2017-03-24 | 2019-11-05 | Western Digital Technologies, Inc. | System and method for dynamic and adaptive interrupt coalescing |
| US10296249B2 (en) | 2017-05-03 | 2019-05-21 | Western Digital Technologies, Inc. | System and method for processing non-contiguous submission and completion queues |
| KR20190051530A (ko) | 2017-11-07 | 2019-05-15 | 에스케이하이닉스 주식회사 | 데이터 처리 시스템 및 데이터 처리 시스템의 동작 방법 |
| JP6954864B2 (ja) | 2018-04-13 | 2021-10-27 | ルネサスエレクトロニクス株式会社 | 半導体装置およびｕｆｓシステム |
| KR102075689B1 (ko) * | 2018-08-16 | 2020-02-10 | 주식회사 넥스트칩 | 태스크의 기능 안전을 보장하기 위한 방법 및 장치 |
| KR102875500B1 (ko) * | 2019-08-06 | 2025-10-24 | 에스케이하이닉스 주식회사 | 데이터 처리 시스템 및 그것의 동작방법 |
| WO2022021372A1 (zh) * | 2020-07-31 | 2022-02-03 | 华为技术有限公司 | 一种处理器、ufs控制方法及计算机系统 |
| KR20220105304A (ko) * | 2021-01-20 | 2022-07-27 | 에스케이하이닉스 주식회사 | 시스템 및 시스템의 동작 방법 |
| JP7612432B2 (ja) * | 2021-01-22 | 2025-01-14 | アズビル株式会社 | モジュールシステム |
| KR20220165128A (ko) | 2021-06-07 | 2022-12-14 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 데이터 처리 시스템 |
| CN114296639B (zh) * | 2021-12-10 | 2024-02-20 | 深圳大普微电子科技有限公司 | 命令处理方法及闪存设备 |
| KR20240015247A (ko) | 2022-07-27 | 2024-02-05 | 에스케이하이닉스 주식회사 | 데이터 코딩 장치, 메모리 컨트롤러 및 스토리지 장치 |
| KR20240116256A (ko) | 2023-01-20 | 2024-07-29 | 삼성전자주식회사 | 예외 이벤트 처리 방법 및 이의 방법으로 예외 이벤트를 처리하는 스토리지 장치 |
| CN117012267B (zh) * | 2023-06-30 | 2024-03-19 | 珠海妙存科技有限公司 | 对ufs所写入数据的验证方法、控制器及介质 |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3783255A (en) * | 1972-07-12 | 1974-01-01 | Gte Automatic Electric Lab Inc | Data handling system maintenance arrangement for processing system trouble conditions |
| US5870758A (en) * | 1996-03-11 | 1999-02-09 | Oracle Corporation | Method and apparatus for providing isolation levels in a database system |
| US6353845B1 (en) * | 1998-06-25 | 2002-03-05 | International Business Machines Corporation | Computer system, program product and method for tracking asynchronous I/O with timeout support |
| US6434637B1 (en) * | 1998-12-31 | 2002-08-13 | Emc Corporation | Method and apparatus for balancing workloads among paths in a multi-path computer system based on the state of previous I/O operations |
| US6275876B1 (en) * | 1999-05-21 | 2001-08-14 | International Business Machines Corporation | Specifying wrap register for storing memory address to store completion status of instruction to external device |
| US6587893B1 (en) | 2000-04-28 | 2003-07-01 | Hewlett-Packard Development Company, L.P. | Method and apparatus to determine when all outstanding fetches are complete |
| US6341367B1 (en) * | 2000-07-25 | 2002-01-22 | Lsi Logic Corporation | Hardware realized state machine |
| US7328304B2 (en) * | 2004-02-27 | 2008-02-05 | Intel Corporation | Interface for a block addressable mass storage system |
| US7219178B2 (en) * | 2004-09-30 | 2007-05-15 | Arm Limited | Bus deadlock avoidance |
| JP2006195746A (ja) * | 2005-01-13 | 2006-07-27 | Oki Electric Ind Co Ltd | マルチレイヤバスシステム |
| US7853957B2 (en) | 2005-04-15 | 2010-12-14 | Intel Corporation | Doorbell mechanism using protection domains |
| JP4848562B2 (ja) * | 2005-08-22 | 2011-12-28 | 新世代株式会社 | マルチプロセッサ |
| JP4814617B2 (ja) * | 2005-11-01 | 2011-11-16 | 株式会社日立製作所 | ストレージシステム |
| US7587543B2 (en) * | 2006-01-23 | 2009-09-08 | International Business Machines Corporation | Apparatus, method and computer program product for dynamic arbitration control |
| GB2440758B (en) * | 2006-08-08 | 2011-03-30 | Advanced Risc Mach Ltd | Interconnect logic for a data processing apparatus |
| US8156273B2 (en) * | 2007-05-10 | 2012-04-10 | Freescale Semiconductor, Inc. | Method and system for controlling transmission and execution of commands in an integrated circuit device |
| US7657682B2 (en) * | 2007-09-14 | 2010-02-02 | Freescale Semiconductor, Inc. | Bus interconnect with flow control |
| EP2452298A4 (en) * | 2009-07-10 | 2014-08-27 | Certicom Corp | SYSTEM AND METHOD FOR IMPLEMENTING DEVICE SELECTION |
| US8549204B2 (en) * | 2010-02-25 | 2013-10-01 | Fresco Logic, Inc. | Method and apparatus for scheduling transactions in a multi-speed bus environment |
| CN103080917B (zh) * | 2010-06-18 | 2014-08-20 | Lsi公司 | 可扩展存储装置 |
| JP2012073851A (ja) * | 2010-09-29 | 2012-04-12 | Sony Corp | バスシステムおよびそのデッドロック回避回路 |
| TWI521343B (zh) * | 2011-08-01 | 2016-02-11 | Toshiba Kk | An information processing device, a semiconductor memory device, and a semiconductor memory device |
| US8700834B2 (en) * | 2011-09-06 | 2014-04-15 | Western Digital Technologies, Inc. | Systems and methods for an enhanced controller architecture in data storage systems |
| CN104040515B (zh) * | 2011-09-30 | 2018-05-11 | 英特尔公司 | 在逻辑驱动器模型下呈现直接存取的存储设备 |
| US8370567B1 (en) * | 2012-03-23 | 2013-02-05 | DSSD, Inc. | Storage system with self describing data |
| US8301832B1 (en) * | 2012-03-23 | 2012-10-30 | DSSD, Inc. | Storage system with guaranteed read latency |
| US8341342B1 (en) * | 2012-03-23 | 2012-12-25 | DSSD, Inc. | Storage system with incremental multi-dimensional RAID |
-
2014
- 2014-08-25 US US14/467,404 patent/US9348537B2/en active Active
- 2014-08-26 KR KR1020167007288A patent/KR101754545B1/ko active Active
- 2014-08-26 JP JP2016540914A patent/JP6173603B2/ja active Active
- 2014-08-26 RU RU2016107810A patent/RU2016107810A/ru not_active Application Discontinuation
- 2014-08-26 EP EP22194758.3A patent/EP4177764A1/en active Pending
- 2014-08-26 CN CN201480049956.9A patent/CN105556497B/zh active Active
- 2014-08-26 WO PCT/US2014/052667 patent/WO2015038325A1/en not_active Ceased
- 2014-08-26 MX MX2016002983A patent/MX350915B/es active IP Right Grant
- 2014-08-26 MY MYPI2016700399A patent/MY177952A/en unknown
- 2014-08-26 EP EP14767183.8A patent/EP3044687A1/en not_active Ceased
- 2014-08-26 AU AU2014318238A patent/AU2014318238B2/en not_active Ceased
- 2014-08-26 NZ NZ717400A patent/NZ717400A/en not_active IP Right Cessation
- 2014-08-26 BR BR112016005368-0A patent/BR112016005368B1/pt active IP Right Grant
- 2014-08-26 CA CA2920748A patent/CA2920748C/en not_active Expired - Fee Related
- 2014-08-26 SG SG11201600764RA patent/SG11201600764RA/en unknown
- 2014-08-29 TW TW103130009A patent/TWI570568B/zh active
-
2016
- 2016-02-19 PH PH12016500339A patent/PH12016500339B1/en unknown
- 2016-03-07 SA SA516370693A patent/SA516370693B1/ar unknown
- 2016-03-10 CL CL2016000555A patent/CL2016000555A1/es unknown
-
2017
- 2017-05-09 JP JP2017092848A patent/JP6599397B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US9348537B2 (en) | 2016-05-24 |
| BR112016005368B1 (pt) | 2022-09-27 |
| CA2920748A1 (en) | 2015-03-19 |
| US20150074338A1 (en) | 2015-03-12 |
| KR101754545B1 (ko) | 2017-07-19 |
| RU2016107810A3 (enExample) | 2018-06-25 |
| MX2016002983A (es) | 2016-06-02 |
| TWI570568B (zh) | 2017-02-11 |
| CL2016000555A1 (es) | 2016-11-18 |
| CN105556497B (zh) | 2017-11-07 |
| JP2016539429A (ja) | 2016-12-15 |
| EP3044687A1 (en) | 2016-07-20 |
| PH12016500339A1 (en) | 2016-05-02 |
| SG11201600764RA (en) | 2016-03-30 |
| TW201523267A (zh) | 2015-06-16 |
| JP6599397B2 (ja) | 2019-10-30 |
| CA2920748C (en) | 2017-09-05 |
| BR112016005368A2 (enExample) | 2017-08-01 |
| NZ717400A (en) | 2017-06-30 |
| AU2014318238B2 (en) | 2017-06-08 |
| JP2017152041A (ja) | 2017-08-31 |
| JP6173603B2 (ja) | 2017-08-02 |
| HK1222239A1 (zh) | 2017-06-23 |
| CN105556497A (zh) | 2016-05-04 |
| AU2014318238A1 (en) | 2016-03-17 |
| RU2016107810A (ru) | 2017-10-16 |
| MY177952A (en) | 2020-09-28 |
| PH12016500339B1 (en) | 2018-10-03 |
| EP4177764A1 (en) | 2023-05-10 |
| SA516370693B1 (ar) | 2018-10-04 |
| KR20160054494A (ko) | 2016-05-16 |
| WO2015038325A1 (en) | 2015-03-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG | Grant or registration |