MX2019002628A - Dispositivo y metodo para mejorar dispositivos de computo planeadores de ruta. - Google Patents

Dispositivo y metodo para mejorar dispositivos de computo planeadores de ruta.

Info

Publication number
MX2019002628A
MX2019002628A MX2019002628A MX2019002628A MX2019002628A MX 2019002628 A MX2019002628 A MX 2019002628A MX 2019002628 A MX2019002628 A MX 2019002628A MX 2019002628 A MX2019002628 A MX 2019002628A MX 2019002628 A MX2019002628 A MX 2019002628A
Authority
MX
Mexico
Prior art keywords
blocks
computing devices
route planning
group
route
Prior art date
Application number
MX2019002628A
Other languages
English (en)
Inventor
S Freed Erik
Original Assignee
Polaris Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Polaris Inc filed Critical Polaris Inc
Publication of MX2019002628A publication Critical patent/MX2019002628A/es

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C21/00Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00
    • G01C21/26Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00 specially adapted for navigation in a road network
    • G01C21/34Route searching; Route guidance
    • G01C21/3453Special cost functions, i.e. other than distance or default speed limit of road segments
    • G01C21/3461Preferred or disfavoured areas, e.g. dangerous zones, toll or emission zones, intersections, manoeuvre types, segments such as motorways, toll roads, ferries
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C21/00Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00
    • G01C21/20Instruments for performing navigational calculations
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C21/00Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00
    • G01C21/26Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00 specially adapted for navigation in a road network
    • G01C21/34Route searching; Route guidance
    • G01C21/3446Details of route searching algorithms, e.g. Dijkstra, A*, arc-flags, using precalculated routes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0873Mapping of cache memory to specific storage devices or parts thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q10/00Administration; Management
    • G06Q10/04Forecasting or optimisation specially adapted for administrative or management purposes, e.g. linear programming or "cutting stock problem"
    • G06Q10/047Optimisation of routes or paths, e.g. travelling salesman problem
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/30Providing cache or TLB in specific location of a processing system
    • G06F2212/302In image processor or graphics adapter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45Caching of specific data in cache memory
    • G06F2212/454Vector or matrix data

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Resources & Organizations (AREA)
  • Automation & Control Theory (AREA)
  • Economics (AREA)
  • Strategic Management (AREA)
  • Operations Research (AREA)
  • Entrepreneurship & Innovation (AREA)
  • Quality & Reliability (AREA)
  • Tourism & Hospitality (AREA)
  • General Business, Economics & Management (AREA)
  • Marketing (AREA)
  • Development Economics (AREA)
  • Game Theory and Decision Science (AREA)
  • Instructional Devices (AREA)
  • Navigation (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Supply And Distribution Of Alternating Current (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
  • Traffic Control Systems (AREA)
  • Image Generation (AREA)

Abstract

Se proporciona un generador de ruta (80) y un método para operar el mismo, que incluye; calcular valores transversales de ruta para una pluralidad de bloques (210,410) en un primer grupo simultáneamente, cada bloque (210,410) incluye una pluralidad de celdas (220), los valores transversales son valores que consideran los datos de costo de movimiento de terreno y datos que indican el avance hacia un destino de ruta, en una base por celda, en donde la pluralidad de bloques (210, 410) se seleccionan de manera que los bloques (210, 410) en el primer grupo fallan en compartir cualquier borde con otros bloques (210, 410) en el primer grupo.
MX2019002628A 2016-09-16 2017-09-15 Dispositivo y metodo para mejorar dispositivos de computo planeadores de ruta. MX2019002628A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/267,942 US10274331B2 (en) 2016-09-16 2016-09-16 Device and method for improving route planning computing devices
PCT/US2017/051800 WO2018053277A2 (en) 2016-09-16 2017-09-15 Device and method for improving route planning computing devices

Publications (1)

Publication Number Publication Date
MX2019002628A true MX2019002628A (es) 2020-02-07

Family

ID=59969264

Family Applications (2)

Application Number Title Priority Date Filing Date
MX2019002628A MX2019002628A (es) 2016-09-16 2017-09-15 Dispositivo y metodo para mejorar dispositivos de computo planeadores de ruta.
MX2021013390A MX2021013390A (es) 2016-09-16 2019-03-06 Dispositivo y metodo para mejorar dispositivos de computo planeadores de ruta.

Family Applications After (1)

Application Number Title Priority Date Filing Date
MX2021013390A MX2021013390A (es) 2016-09-16 2019-03-06 Dispositivo y metodo para mejorar dispositivos de computo planeadores de ruta.

Country Status (9)

Country Link
US (3) US10274331B2 (es)
EP (1) EP3513145A2 (es)
JP (3) JP7177768B2 (es)
AU (5) AU2017326010B2 (es)
CA (3) CA3155788A1 (es)
IL (3) IL290888B2 (es)
MX (2) MX2019002628A (es)
TW (3) TWI718612B (es)
WO (1) WO2018053277A2 (es)

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Also Published As

Publication number Publication date
US20180080781A1 (en) 2018-03-22
AU2023201614A1 (en) 2023-04-13
JP7177768B2 (ja) 2022-11-24
CA3036558A1 (en) 2018-03-22
AU2023201623A1 (en) 2023-04-13
IL290888B2 (en) 2023-03-01
IL297535A (en) 2022-12-01
TW201823681A (zh) 2018-07-01
IL290888B (en) 2022-11-01
IL265293A (en) 2019-05-30
CA3036558C (en) 2022-07-05
TW202025145A (zh) 2020-07-01
US20220187086A1 (en) 2022-06-16
WO2018053277A3 (en) 2018-04-19
AU2023201616A1 (en) 2023-04-13
IL290888A (en) 2022-04-01
TWI676004B (zh) 2019-11-01
US11268820B2 (en) 2022-03-08
US10274331B2 (en) 2019-04-30
TWI718612B (zh) 2021-02-11
IL297535B2 (en) 2024-05-01
WO2018053277A2 (en) 2018-03-22
AU2021201050B2 (en) 2022-12-15
TW201901115A (zh) 2019-01-01
JP2023017961A (ja) 2023-02-07
AU2017326010B2 (en) 2020-11-19
JP2023015273A (ja) 2023-01-31
US11892309B2 (en) 2024-02-06
JP7495970B2 (ja) 2024-06-05
IL297535B1 (en) 2024-01-01
AU2017326010A1 (en) 2019-04-11
CA3155788A1 (en) 2018-03-22
US20190226858A1 (en) 2019-07-25
MX2021013390A (es) 2021-11-25
JP2019529898A (ja) 2019-10-17
AU2021201050A1 (en) 2021-03-11
EP3513145A2 (en) 2019-07-24
CA3231885A1 (en) 2018-03-22
IL265293B (en) 2022-03-01
TWI651515B (zh) 2019-02-21

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