MX2014015093A - Procesador y sistema informaticos sin una unidad aritmetica y logica. - Google Patents

Procesador y sistema informaticos sin una unidad aritmetica y logica.

Info

Publication number
MX2014015093A
MX2014015093A MX2014015093A MX2014015093A MX2014015093A MX 2014015093 A MX2014015093 A MX 2014015093A MX 2014015093 A MX2014015093 A MX 2014015093A MX 2014015093 A MX2014015093 A MX 2014015093A MX 2014015093 A MX2014015093 A MX 2014015093A
Authority
MX
Mexico
Prior art keywords
arithmetic
instruction
specific
memory
logic unit
Prior art date
Application number
MX2014015093A
Other languages
English (en)
Inventor
Ludovicus Marinus Gerardus Maria Tolhuizen
Mina Deng
Paulus Mathias Hubertus Mechtildis Antoni Gorissen
Arnoldus Jeroen Niessen
Original Assignee
Koninkl Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Nv filed Critical Koninkl Philips Nv
Publication of MX2014015093A publication Critical patent/MX2014015093A/es

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02Digital function generators
    • G06F1/03Digital function generators working, at least partly, by table look-up
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029Logical and Boolean instructions, e.g. XOR, NOT
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3005Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30061Multi-way branch instructions, e.g. CASE
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/324Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address using program counter relative addressing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)

Abstract

Un sistema informático que comprende un procesador y una memoria, el procesador que comprende un circuito de ciclo de instrucciones configurado para obtener de manera repetida una siguiente instrucción de un programa informático, un decodificador de instrucciones configurado para decodificar y ejecutar la instrucción obtenida por el circuito de ciclo de instrucciones, el sistema informático que soporta múltiples operaciones aritméticas y/o lógicas bajo el control de una o más de las instrucciones, en donde la memoria almacena múltiples tablas, cada una específica de las operaciones aritméticas y/o lógicas que se soportan por una tabla específica almacenada en la memoria, cada tabla específica que comprende el resultado de las operaciones aritméticas específicas para un intervalo de entradas.
MX2014015093A 2012-07-06 2013-07-06 Procesador y sistema informaticos sin una unidad aritmetica y logica. MX2014015093A (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201261668482P 2012-07-06 2012-07-06
EP13156975 2013-02-27
PCT/IB2013/055541 WO2014006605A2 (en) 2012-07-06 2013-07-06 Computer processor and system without an arithmetic and logic unit

Publications (1)

Publication Number Publication Date
MX2014015093A true MX2014015093A (es) 2015-03-05

Family

ID=47757440

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2014015093A MX2014015093A (es) 2012-07-06 2013-07-06 Procesador y sistema informaticos sin una unidad aritmetica y logica.

Country Status (9)

Country Link
US (1) US20150324199A1 (es)
EP (1) EP2870529A2 (es)
JP (1) JP6300796B2 (es)
CN (1) CN104395876B (es)
BR (1) BR112014032625A2 (es)
MX (1) MX2014015093A (es)
RU (1) RU2015103934A (es)
WO (1) WO2014006605A2 (es)
ZA (1) ZA201500848B (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2701716C2 (ru) * 2014-09-30 2019-09-30 Конинклейке Филипс Н.В. Электронное вычислительное устройство для выполнения арифметики с обфускацией
US10114795B2 (en) 2016-12-30 2018-10-30 Western Digital Technologies, Inc. Processor in non-volatile storage memory
US10885985B2 (en) 2016-12-30 2021-01-05 Western Digital Technologies, Inc. Processor in non-volatile storage memory
CN107527189B (zh) * 2017-08-31 2021-01-29 上海钜祥精密模具有限公司 一种产品状态的存储方法及可编程逻辑控制器
US10902113B2 (en) * 2017-10-25 2021-01-26 Arm Limited Data processing
FR3083351B1 (fr) * 2018-06-29 2021-01-01 Vsora Architecture de processeur asynchrone
FR3083350B1 (fr) * 2018-06-29 2021-01-01 Vsora Acces memoire de processeurs
CN110058884B (zh) * 2019-03-15 2021-06-01 佛山市顺德区中山大学研究院 用于计算型存储指令集运算的优化方法、系统及存储介质
CN111723920B (zh) * 2019-03-22 2024-05-17 中科寒武纪科技股份有限公司 人工智能计算装置及相关产品
US20220164442A1 (en) * 2019-08-12 2022-05-26 Hewlett-Packard Development Company, L.P. Thread mapping

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL136144C (es) * 1959-10-19 1900-01-01
JPS60133496A (ja) * 1983-12-21 1985-07-16 三菱電機株式会社 画像処理装置
DE4320263A1 (de) * 1993-06-18 1994-12-22 Gsf Forschungszentrum Umwelt Datenverarbeitungsmaschine
US5907711A (en) * 1996-01-22 1999-05-25 Hewlett-Packard Company Method and apparatus for transforming multiplications into product table lookup references
US6282633B1 (en) * 1998-11-13 2001-08-28 Tensilica, Inc. High data density RISC processor
JP4004915B2 (ja) * 2002-06-28 2007-11-07 株式会社ルネサステクノロジ データ処理装置
JP2007087045A (ja) * 2005-09-21 2007-04-05 Canon Inc 時刻同期デバイス装置
JP2008191807A (ja) * 2007-02-02 2008-08-21 Seiko Epson Corp プログラム実行装置及び電子機器

Also Published As

Publication number Publication date
EP2870529A2 (en) 2015-05-13
WO2014006605A2 (en) 2014-01-09
CN104395876B (zh) 2018-05-08
US20150324199A1 (en) 2015-11-12
BR112014032625A2 (pt) 2017-06-27
WO2014006605A3 (en) 2014-03-13
CN104395876A (zh) 2015-03-04
JP2015527642A (ja) 2015-09-17
ZA201500848B (en) 2017-01-25
JP6300796B2 (ja) 2018-03-28
RU2015103934A (ru) 2016-08-27

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