MX158195A - Mejoras en una memoria provisional para un sistema de procesamiento de datos - Google Patents

Mejoras en una memoria provisional para un sistema de procesamiento de datos

Info

Publication number
MX158195A
MX158195A MX192263A MX19226382A MX158195A MX 158195 A MX158195 A MX 158195A MX 192263 A MX192263 A MX 192263A MX 19226382 A MX19226382 A MX 19226382A MX 158195 A MX158195 A MX 158195A
Authority
MX
Mexico
Prior art keywords
data processing
processing system
provisional memory
provisional
memory
Prior art date
Application number
MX192263A
Other languages
English (en)
Inventor
Marvin K Webster
Richard T Flynn
Marion G Porter
Original Assignee
Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Bull filed Critical Honeywell Bull
Publication of MX158195A publication Critical patent/MX158195A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0808—Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
MX192263A 1981-08-03 1982-04-14 Mejoras en una memoria provisional para un sistema de procesamiento de datos MX158195A (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/289,663 US4525777A (en) 1981-08-03 1981-08-03 Split-cycle cache system with SCU controlled cache clearing during cache store access period

Publications (1)

Publication Number Publication Date
MX158195A true MX158195A (es) 1989-01-16

Family

ID=23112533

Family Applications (1)

Application Number Title Priority Date Filing Date
MX192263A MX158195A (es) 1981-08-03 1982-04-14 Mejoras en una memoria provisional para un sistema de procesamiento de datos

Country Status (9)

Country Link
US (1) US4525777A (es)
EP (1) EP0072179B1 (es)
JP (1) JPS5823375A (es)
KR (1) KR880000299B1 (es)
AU (1) AU550924B2 (es)
CA (1) CA1173565A (es)
DE (1) DE3277710D1 (es)
MX (1) MX158195A (es)
YU (1) YU44081B (es)

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JP2601951B2 (ja) * 1991-01-11 1997-04-23 株式会社東芝 半導体集積回路
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US5701313A (en) * 1995-02-24 1997-12-23 Unisys Corporation Method and apparatus for removing soft errors from a memory
US5511164A (en) * 1995-03-01 1996-04-23 Unisys Corporation Method and apparatus for determining the source and nature of an error within a computer system
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US5875201A (en) * 1996-12-30 1999-02-23 Unisys Corporation Second level cache having instruction cache parity error control
US5960455A (en) * 1996-12-30 1999-09-28 Unisys Corporation Scalable cross bar type storage controller
US5970253A (en) * 1997-01-09 1999-10-19 Unisys Corporation Priority logic for selecting and stacking data
US5822766A (en) * 1997-01-09 1998-10-13 Unisys Corporation Main memory interface for high speed data transfer
US5860093A (en) * 1997-01-21 1999-01-12 Unisys Corporation Reduced instruction processor/storage controller interface
US6928517B1 (en) 2000-08-30 2005-08-09 Unisys Corporation Method for avoiding delays during snoop requests
US7069391B1 (en) 2000-08-30 2006-06-27 Unisys Corporation Method for improved first level cache coherency
US6857049B1 (en) 2000-08-30 2005-02-15 Unisys Corporation Method for managing flushes with the cache
US6697925B1 (en) 2000-12-22 2004-02-24 Unisys Corporation Use of a cache ownership mechanism to synchronize multiple dayclocks
US6785775B1 (en) 2002-03-19 2004-08-31 Unisys Corporation Use of a cache coherency mechanism as a doorbell indicator for input/output hardware queues
US8842127B1 (en) * 2005-04-25 2014-09-23 Apple Inc. Text rendering with improved glyph cache management
WO2007045051A1 (en) 2005-10-21 2007-04-26 Honeywell Limited An authorisation system and a method of authorisation
US8351350B2 (en) * 2007-05-28 2013-01-08 Honeywell International Inc. Systems and methods for configuring access control devices
WO2008144804A1 (en) * 2007-05-28 2008-12-04 Honeywell International Inc Systems and methods for commissioning access control devices
WO2009094731A1 (en) * 2008-01-30 2009-08-06 Honeywell International Inc. Systems and methods for managing building services
WO2010039598A2 (en) 2008-09-30 2010-04-08 Honeywell International Inc. Systems and methods for interacting with access control devices
US8878931B2 (en) 2009-03-04 2014-11-04 Honeywell International Inc. Systems and methods for managing video data
EP2408984B1 (en) 2009-03-19 2019-11-27 Honeywell International Inc. Systems and methods for managing access control devices
US9280365B2 (en) * 2009-12-17 2016-03-08 Honeywell International Inc. Systems and methods for managing configuration data at disconnected remote devices
US8707414B2 (en) * 2010-01-07 2014-04-22 Honeywell International Inc. Systems and methods for location aware access control management
US8787725B2 (en) 2010-11-11 2014-07-22 Honeywell International Inc. Systems and methods for managing video data
US9894261B2 (en) 2011-06-24 2018-02-13 Honeywell International Inc. Systems and methods for presenting digital video management system information via a user-customizable hierarchical tree interface
WO2013020165A2 (en) 2011-08-05 2013-02-14 HONEYWELL INTERNATIONAL INC. Attn: Patent Services Systems and methods for managing video data
US10362273B2 (en) 2011-08-05 2019-07-23 Honeywell International Inc. Systems and methods for managing video data
US9344684B2 (en) 2011-08-05 2016-05-17 Honeywell International Inc. Systems and methods configured to enable content sharing between client terminals of a digital video management system
US9367464B2 (en) * 2011-12-30 2016-06-14 Intel Corporation Cache circuit having a tag array with smaller latency than a data array
US10523903B2 (en) 2013-10-30 2019-12-31 Honeywell International Inc. Computer implemented systems frameworks and methods configured for enabling review of incident data
US10901908B2 (en) 2019-01-16 2021-01-26 International Business Machines Corporation Storing data into a memory

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Also Published As

Publication number Publication date
KR840001368A (ko) 1984-04-30
AU8162082A (en) 1983-02-10
EP0072179B1 (en) 1987-11-19
YU44081B (en) 1990-02-28
CA1173565A (en) 1984-08-28
EP0072179A3 (en) 1985-01-23
JPS5823375A (ja) 1983-02-12
YU169182A (en) 1985-03-20
EP0072179A2 (en) 1983-02-16
US4525777A (en) 1985-06-25
AU550924B2 (en) 1986-04-10
KR880000299B1 (ko) 1988-03-19
DE3277710D1 (en) 1987-12-23

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