KR980005881A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

Info

Publication number
KR980005881A
KR980005881A KR1019960024493A KR19960024493A KR980005881A KR 980005881 A KR980005881 A KR 980005881A KR 1019960024493 A KR1019960024493 A KR 1019960024493A KR 19960024493 A KR19960024493 A KR 19960024493A KR 980005881 A KR980005881 A KR 980005881A
Authority
KR
South Korea
Prior art keywords
polysilicon layer
forming
polysilicon
insulating film
semiconductor device
Prior art date
Application number
KR1019960024493A
Other languages
Korean (ko)
Inventor
이진순
장명식
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960024493A priority Critical patent/KR980005881A/en
Publication of KR980005881A publication Critical patent/KR980005881A/en

Links

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체 소자의 제조방법에 있어서, 스페이서를 형성하지 않고 LDD구조의 소오스/드레인 영역을 형성할 수 있는 반도체 소자의 제조방법에 관한 것으로, 반도체 기판상에 절연막을 형성하는 단계; 절연막 상부에 제1폴리실리콘을 형성하는 단계; 제1폴리실리콘 상부에 제1폴리실리콘보다 도핑된 불순물 농도가 더 높은 제2폴리실리콘을 형성하는 단계; 절연막과 제1 및 제2 폴리실리콘을 식각하여 2중 구조의 게이트 전극을 형성하는 단계; 2중 구조의 게이트 전극을 식각 마스크로하여 반도체 기판 표면으로 불순물 이온을 주입하는 단계를 포함하는 것을 특징으로 한다.The present invention relates to a method of manufacturing a semiconductor device capable of forming a source / drain region of an LDD structure without forming a spacer in a method of manufacturing a semiconductor device, the method comprising: forming an insulating film on a semiconductor substrate; Forming a first polysilicon layer on the insulating film; Forming a second polysilicon layer on the first polysilicon layer, the second polysilicon layer having a higher impurity concentration than the first polysilicon layer; Etching the insulating film and the first and second polysilicon to form a gate electrode having a double structure; And implanting impurity ions into the surface of the semiconductor substrate using the double-structured gate electrode as an etching mask.

Description

반도체 소자의 제조방법Method of manufacturing semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2a도 내지 제2c도는 본 발명의 일 실시예에 따른 반도체 소자의 제조방법을 나타낸 단면도.FIGS. 2a to 2c are cross-sectional views illustrating a method of manufacturing a semiconductor device according to an embodiment of the present invention;

Claims (2)

반도체 기판상에 절연막을 형성하는 단계; 상기 절연막 상부에 제1폴리실리콘을 형성하는 단계: 상기 제1폴리실리콘 상부에 상기 제1폴리실리콘보다 도핑된 불순물 농도가 더 높은 제2폴리실리콘을 형성하는 단계; 상기 절연막과 제1및 제2 폴리실리콘을 식각하여 2중 구조의 게이트 전극을 형성하는 단계; 및, 상기 2중 구조의 게이트 전극을 식각 마스크로 하여 상기 반도체 기판표면으로 불순물 이온을 주입하는 단계를 포함하는 것을 특징으로 하는 반도체소자의 제조방법.Forming an insulating film on the semiconductor substrate; Forming a first polysilicon layer on the insulating layer; forming a second polysilicon layer on the first polysilicon layer, the second polysilicon layer having a higher impurity concentration than the first polysilicon layer; Etching the insulating film and the first and second polysilicon to form a gate electrode having a double structure; And implanting impurity ions into the surface of the semiconductor substrate using the double-structured gate electrode as an etching mask. 제1항에 있어서, 상기 제2 폴리실리콘은 상기 제1 폴리실리콘보다 식각 속도가 빠른 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the second polysilicon has a higher etching rate than the first polysilicon. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960024493A 1996-06-27 1996-06-27 Method of manufacturing semiconductor device KR980005881A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960024493A KR980005881A (en) 1996-06-27 1996-06-27 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960024493A KR980005881A (en) 1996-06-27 1996-06-27 Method of manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
KR980005881A true KR980005881A (en) 1998-03-30

Family

ID=66240958

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960024493A KR980005881A (en) 1996-06-27 1996-06-27 Method of manufacturing semiconductor device

Country Status (1)

Country Link
KR (1) KR980005881A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990057347A (en) * 1997-12-29 1999-07-15 김영환 Manufacturing method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990057347A (en) * 1997-12-29 1999-07-15 김영환 Manufacturing method of semiconductor device

Similar Documents

Publication Publication Date Title
KR960012564A (en) Thin film transistor and method of forming the same
KR960005896A (en) Method of manufacturing thin film transistor
KR950021786A (en) MOSFET and manufacturing method
KR980005881A (en) Method of manufacturing semiconductor device
KR970054431A (en) MOS transistor and manufacturing method thereof
KR960026459A (en) Transistor Manufacturing Method
KR980005882A (en) MOS transistor and its manufacturing method
KR970054438A (en) Power MOS device having an inclined gate oxide film and method of manufacturing same
KR970077366A (en) Method of manufacturing high-voltage transistor
KR970072477A (en) Morse transistor structure and manufacturing method
KR950012645A (en) Method of manufacturing thin film transistor of semiconductor device
KR970072489A (en) Thin film transistor manufacturing method
KR970060509A (en) Method of manufacturing semiconductor device
KR980006543A (en) Method of manufacturing semiconductor device
KR920013601A (en) MOS transistor manufacturing method
KR940010387A (en) Semiconductor device manufacturing method
KR960035918A (en) Shallow Junction Formation Method of Semiconductor Devices
KR970077364A (en) Semiconductor device manufacturing method
KR970054258A (en) Method of manufacturing thin film transistor
KR970030917A (en) Method of manufacturing thin film transistor
KR970072468A (en) Method of manufacturing transistor of semiconductor device
KR960026973A (en) Method of manufacturing thin film transistor
KR970053016A (en) Transistor manufacturing method of semiconductor device
KR970063501A (en) Method of manufacturing semiconductor device
KR920015592A (en) LDD structure transistor manufacturing method

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application