KR970063501A

KR970063501A - Method of manufacturing semiconductor device

Info

Publication number: KR970063501A
Application number: KR1019960005005A
Authority: KR
Inventors: 곽영식
Original assignee: 문정환; Lg반도체 주식회사
Priority date: 1996-02-28
Filing date: 1996-02-28
Publication date: 1997-09-12

Abstract

본 발명은 반도체소자의 제조방법에 관한 것으로, 마스크공정을 줄이는데 적당하도록 한 것이다.The present invention relates to a method of manufacturing a semiconductor device, and is suitable for reducing a mask process.

본 발명에 따른 반도체소자의 제조방법은 반도체기판을 준비하는 단계; 상기 반도체기판위에 제1도전층을 형성하는 단계; 상기 제1도전층을 패터닝하여 게이트전극을 형성하는 단계; 상기 게이트전극을 마스크로 상기 게이트전극 양측의 반도체기판에 저농도 불순물이온을 주입하여 저농도 불순물영역을 형성하는 단계; 상기 게이트전극과 반도체 기판의 노출된 표면위에 절연막을 형성하는 단계; 상기 절연막을 선택적으로 제거하여 상기 저농도 불순물영역을 노출시키는 콘택홀을 형성하는 단계; 상기 콘택홀을 통해 저농도 불순물영역에 고농도 불순물이온을 주입하여 고농도 불순물영역을 형성하는 단계; 상기 콘택홀을 포함한 절연막위에 상기 고농도 불순물영역과 접속되도록 제2도전층을 형성하는 단계를 포함하여 이루어진다.A method of manufacturing a semiconductor device according to the present invention includes: preparing a semiconductor substrate; Forming a first conductive layer on the semiconductor substrate; Patterning the first conductive layer to form a gate electrode; Implanting low-concentration impurity ions into the semiconductor substrate on both sides of the gate electrode using the gate electrode as a mask to form a low-concentration impurity region; Forming an insulating film on the exposed surface of the gate electrode and the semiconductor substrate; Selectively removing the insulating film to form a contact hole exposing the lightly doped impurity region; Implanting high-concentration impurity ions into the low-concentration impurity region through the contact hole to form a high-concentration impurity region; And forming a second conductive layer on the insulating film including the contact hole so as to be connected to the high concentration impurity region.

Description

Method of manufacturing semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2a∼2e도는 본 발명에 따른 반도체자의 제조공정도.Figures 2a to 2e are diagrammatic views of the manufacturing process of the semiconductor chip according to the present invention.

Claims

Preparing a semiconductor substrate; Forming a first conductive layer on the semiconductor substrate; Patterning the first conductive layer to form a gate electrode; Implanting low-concentration impurity ions into the semiconductor substrate on both sides of the gate electrode using the gate electrode as a mask to form a low-concentration impurity region; Forming an insulating film on the exposed surface of the gate electrode and the semiconductor substrate; Selectively removing the insulating film to form a contact hole exposing the lightly doped impurity region; Implanting high-concentration impurity ions into the low-concentration impurity region through the contact hole to form a high-concentration impurity region; And forming a second conductive layer on the insulating film including the contact hole so as to be connected to the high concentration impurity region.

※ Note: It is disclosed by the contents of the first application.