KR980005729A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
KR980005729A
KR980005729A KR1019960023461A KR19960023461A KR980005729A KR 980005729 A KR980005729 A KR 980005729A KR 1019960023461 A KR1019960023461 A KR 1019960023461A KR 19960023461 A KR19960023461 A KR 19960023461A KR 980005729 A KR980005729 A KR 980005729A
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KR
South Korea
Prior art keywords
oxide
semiconductor device
silicon substrate
manufacturing
forming
Prior art date
Application number
KR1019960023461A
Other languages
Korean (ko)
Inventor
김정우
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960023461A priority Critical patent/KR980005729A/en
Publication of KR980005729A publication Critical patent/KR980005729A/en

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 소자의 제조방법을 제공하는 것으로, 채널길이를 스페이서에 으해 결정하므로 마스크의 부정합에 의한 마진이 필요없게 되어 짧은 채널을 균일하게 형성할 수 있는 효과가 있다.The present invention provides a method for manufacturing a semiconductor device, and since the channel length is determined by the spacer, there is no need for a margin due to mismatching of the mask, and thus the short channel can be uniformly formed.

Description

반도체 소자의 제조방법Manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2a도 내지 제2f도는 본 발명에 따른 반도체 소자의 제조방법을 설명하기 위한 소자의 단면도.2A to 2F are cross-sectional views of a device for explaining a method of manufacturing a semiconductor device according to the present invention.

Claims (3)

반도체 소자의 제조방법에 있어서, 터널 산화막이 형성된 실리콘 기판상에 스택게이트를 자기 정합 식각방식으로 형성하는 단계와, 상기 단계로부터 상기 실리콘기판의 전체 상부면에 절연막 및 산화막을 순차적으로 형성한 후 상기 절연막이 노출되도록 상기 산화막을 전면 식각하여 상기 스택게이트의 양측벽에 산화막 스페이서를 형성하는 단계와, 상기 단계로부터 드레인측의 상기 산화막 스페이서를 제거하는 단계와, 상기 단계로부터 상기 산화막 스페이서를 마스크로 이용하여 접합영역을 형성하는 단계와, 상기 단계로부터 남아있는 상기산화막 스페이서를 제거한 후 상기 절연막을 전면 식각하여 상기 스택게이트의 양 측벽에 절연막 스페이서를형성하는 단계와, 상기 단계로부터 노출된 상기 실리콘 기판상에 게이트 산화막을 형성한 후 상기 실리콘 기판의 전체 상부면에 제3플리실리콘 층을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 제조방법.A method of manufacturing a semiconductor device, comprising: forming a stack gate by a self-matching etching method on a silicon substrate on which a tunnel oxide film is formed, and sequentially forming an insulating film and an oxide film on the entire upper surface of the silicon substrate from the step; Etching the entire oxide film to expose the insulating film to form oxide spacers on both sidewalls of the stack gate; removing the oxide spacer on the drain side from the step; and using the oxide spacer as a mask from the step. Forming a junction region, removing the remaining oxide spacers from the step, and then etching the entire insulating layer to form insulating layer spacers on both sidewalls of the stack gate; and on the silicon substrate exposed from the step. After the gate oxide is formed on the phase The method of producing a semiconductor device, characterized in that comprising the step of forming a third replicon silicon layer on the top surface of the silicon substrate. 제1항에 있어서, 상기 절연막의 ONO 구조로서 300 내지 600Å의 두께로 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the insulating film is formed to a thickness of 300 to 600 kV as the ONO structure of the insulating film. 제1항에 있어서, 상기 산화막은 300 내지 2500Å의 두께로 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the oxide film is formed to a thickness of 300 to 2500 kPa. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960023461A 1996-06-25 1996-06-25 Manufacturing method of semiconductor device KR980005729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960023461A KR980005729A (en) 1996-06-25 1996-06-25 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960023461A KR980005729A (en) 1996-06-25 1996-06-25 Manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
KR980005729A true KR980005729A (en) 1998-03-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960023461A KR980005729A (en) 1996-06-25 1996-06-25 Manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR980005729A (en)

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