KR980005677A - Silicide Formation Method of Semiconductor Device - Google Patents

Silicide Formation Method of Semiconductor Device Download PDF

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Publication number
KR980005677A
KR980005677A KR1019960022856A KR19960022856A KR980005677A KR 980005677 A KR980005677 A KR 980005677A KR 1019960022856 A KR1019960022856 A KR 1019960022856A KR 19960022856 A KR19960022856 A KR 19960022856A KR 980005677 A KR980005677 A KR 980005677A
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KR
South Korea
Prior art keywords
metal silicide
semiconductor device
film
annealing
silicide
Prior art date
Application number
KR1019960022856A
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Korean (ko)
Other versions
KR100209931B1 (en
Inventor
여태정
권혁진
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960022856A priority Critical patent/KR100209931B1/en
Publication of KR980005677A publication Critical patent/KR980005677A/en
Application granted granted Critical
Publication of KR100209931B1 publication Critical patent/KR100209931B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/488—Word lines

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 실리사이드 형성방법에 관한 것으로, 보다 구체적으로 금속 실리사이드내의 잉여 실리콘을 완전히 제거하기 위한 반도체 소자의 실리사이드 형성방법에 관한것이다. 본 발명은 금속 실리사이드막이 증착되고, 층간 절연막이 형성되기 이전에 수소 분위기 하에서 어닐링 공정을 진행하여 주므르써, 금속 실리사이드 내의 실리콘 원자를 외확산시켜준다. 이로써, 금속 실리사이드내의 실리콘 함유량이 감소되어, 금속 실리사이드의 막질 전도 특성이 개선된다.The present invention relates to a method for forming silicide of a semiconductor device, and more particularly, to a method for forming a silicide of a semiconductor device for completely removing excess silicon in a metal silicide. In the present invention, an annealing process is performed under a hydrogen atmosphere before the metal silicide film is deposited and the interlayer insulating film is formed, thereby externally diffusing silicon atoms in the metal silicide. As a result, the silicon content in the metal silicide is reduced, and the film conduction property of the metal silicide is improved.

Description

반도체 소자의 실리사이드 형성방법Silicide Formation Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1a도 및 제1b도는 종래의 반도체 소자의 실리사이드 형성방법을 설명하기 위한 단면도.1A and 1B are cross-sectional views for explaining a silicide formation method of a conventional semiconductor device.

Claims (6)

반도체 기판상에 폴리실리콘막을 증착하는 단계; 상기 폴리실리콘막 상부에 전이 금속 실리사이드막을 적층하는 단계; 및 상기 전이 금속 실리사이드막내의 전이 금속막을 이루는 원자에 대한 실리콘의 원자의 비가 2.2내지 2.3이 되도록 상기 결과물을 어닐링하는 단계를 포함하는 것을 특징으로 반도체 소자의 실리사이드 형성방법.Depositing a polysilicon film on a semiconductor substrate; Stacking a transition metal silicide layer on the polysilicon layer; And annealing the resultant so that a ratio of atoms of silicon to atoms constituting the transition metal film in the transition metal silicide film is 2.2 to 2.3. 제1항에 있어서, 상기 전이 금속막은 텅스텐인 것을 특징으로 하는 반도체 소자의 실리사이드 형성방법.The method of claim 1, wherein the transition metal film is tungsten. 제1항 또는 제2항에 있어서, 상기 어닐링 단계는 수소 분위기하에서 진행하는 것을 특징으로 하는 반도체 소자의 실리사이드 형성방법.The method of claim 1 or 2, wherein the annealing is performed in a hydrogen atmosphere. 제3항에 있어서, 상기 어닐링 단계에서의 수소 플로우량은 9 내지 10slm인 것을 특징으로 하는 반도체 소자의 실리사이드 형성방법.The method of claim 3, wherein the hydrogen flow amount in the annealing step is 9 to 10 slm. 제1항에 있어서, 상기 어닐링은 싱글 웨이퍼 챔버에서 이루어지는 것을 특징으로 하는 반도체 소자의 실리사이드 형성방법.The method of claim 1, wherein the annealing is performed in a single wafer chamber. 제1항에 있어서, 상기 어닐링 온도는 800℃ 내지 1000℃인 것을 특징으로 하는 반도체 소자의 실리사이드 형성 방법.The method of claim 1, wherein the annealing temperature is 800 ° C. to 1000 ° C. 6. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960022856A 1996-06-21 1996-06-21 Silicide making method for semiconductor device KR100209931B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960022856A KR100209931B1 (en) 1996-06-21 1996-06-21 Silicide making method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960022856A KR100209931B1 (en) 1996-06-21 1996-06-21 Silicide making method for semiconductor device

Publications (2)

Publication Number Publication Date
KR980005677A true KR980005677A (en) 1998-03-30
KR100209931B1 KR100209931B1 (en) 1999-07-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960022856A KR100209931B1 (en) 1996-06-21 1996-06-21 Silicide making method for semiconductor device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573180B2 (en) 2001-03-23 2003-06-03 Samsung Electronics Co., Ltd. PECVD method of forming a tungsten silicide layer on a polysilicon layer
KR100753401B1 (en) * 2001-06-15 2007-08-30 주식회사 하이닉스반도체 Method of manufacturing flash memory device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573180B2 (en) 2001-03-23 2003-06-03 Samsung Electronics Co., Ltd. PECVD method of forming a tungsten silicide layer on a polysilicon layer
KR100447031B1 (en) * 2001-03-23 2004-09-07 삼성전자주식회사 Method of forming tungsten silicide film
KR100753401B1 (en) * 2001-06-15 2007-08-30 주식회사 하이닉스반도체 Method of manufacturing flash memory device

Also Published As

Publication number Publication date
KR100209931B1 (en) 1999-07-15

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