KR980005507A

KR980005507A - Gate Forming Method of Semiconductor Device

Info

Publication number: KR980005507A
Application number: KR1019960023993A
Authority: KR
Inventors: 오승영
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1996-06-26
Filing date: 1996-06-26
Publication date: 1998-03-30

Abstract

본 발명은 반도체장치의 게이트 형성방법에 관한 것이다. 본 발명에 의한 게이트 형성방법은 반도체가판 상에 산화막 및 도전층을 순차적으로 형성하는 제1단계, 상기 도전층의 두께를 일정량 식각하여 제1도전층 패턴을 형성하는 제2단계 및 상기 제1도전층 패턴의 나머지와 산화막의 일부를 식각하여 제2도전층 패턴을 형성하는 제3단계를 포함한다.The present invention relates to a method for forming a gate of a semiconductor device. In the gate forming method according to the present invention, a first step of sequentially forming an oxide film and a conductive layer on a semiconductor substrate, a second step of forming a first conductive layer pattern by etching a predetermined amount of the thickness of the conductive layer, and the first conductive And etching the remainder of the layer pattern and a portion of the oxide film to form a second conductive layer pattern.

본 발명은 수직한 형태로 게이트전극을 형성할 수 있을 뿐만 아니라 식각이 완료된 후 기판상에는 여전히 일정두께의 산화막이 형성되어 있으므로 종래 기술에 의한 게이트 형성과정에서 반도체기판 상에 미세트랜치가 형성되는 것을 방지할 수 잇다. 그러므로 반도체기판의 표면을 부드럽게 하고 이후 형성되는 박막의 부착상태를 양호하게 할 수 있다.According to the present invention, the gate electrode can be formed in a vertical shape, and since an oxide film having a predetermined thickness is still formed on the substrate after etching, the micro trench is prevented from being formed on the semiconductor substrate during the gate formation process according to the prior art. You can do it. Therefore, it is possible to smooth the surface of the semiconductor substrate and to improve the adhesion state of the thin film formed thereafter.

Description

Gate Forming Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도 내지 제5도는 본 발명에 의한 반도체장치의 게이트 형성방법을 나타낸 도면들이다.3 to 5 are diagrams illustrating a gate forming method of a semiconductor device according to the present invention.

Claims

A first step of sequentially forming an oxide film and a conductive layer on the semiconductor substrate; A second step of forming a first conductive layer pattern by etching a predetermined amount of the thickness of the conductive layer; And forming a second conductive layer pattern by etching the remaining portion of the first conductive layer pattern and a portion of the oxide layer.

The method of claim 1, wherein the conductive layer is viewed at 50% to 90% in the second step.

The method of claim 1, wherein chlorine gas (Cl ₂ ) and helium gas are used as the etch emitter in the second step.

The gate forming method of a semiconductor device according to claim 1, wherein the third step uses filtrate gas (Cl ₂ ) and hydrogen bromide gas (HBr) as an emitter.

The method of claim 1, wherein in the second step, chlorine (Cl ₂ ) and nitrogen gas (N ₂ ) are used as an emitter.

The gate forming method of a semiconductor device according to claim 1, wherein in the second step, chlorine gas (Cl ₂ ) and oxygen gas (O ₂ ) are used as an emitter.

※ Note: The disclosure is based on the initial application.