KR970071259A

KR970071259A - Bus control method of a multiprocessor system

Info

Publication number: KR970071259A
Application number: KR1019960010497A
Authority: KR
Inventors: 정병선
Original assignee: 구자홍; Lg 전자주식회사
Priority date: 1996-04-08
Filing date: 1996-04-08
Publication date: 1997-11-07

Abstract

본 발명은 여러개의 프로세서가 매우 빈번하게 동시에 시스템 버스에 접근할 때 발생하는 버스 트래픽(Traffic)을 감소시켜 성능 향상과 신뢰성을 증대시키도록 한 다중처리기 시스템의 버스 제어방법에 관한 것이다. 이러한 본 발명은 A채널과 B채널의 버스 접근시 A채널에 우선 순위를 두고, A채널이 버스 사용을 요구한 경우 버스 주기에 따라 이를 처리하고, B채널로부터 버스 사용 요구가 있을 경우에는 A채널의 버스 사용 여부를 검색하여 A채널의 버스 사용이 종료된 경우에만 B채널에서 버스 사용이 가능토록 한다.The present invention relates to a bus control method of a multiprocessor system which increases performance and reliability by reducing bus traffic occurring when several processors access the system bus very frequently at the same time. In the present invention, priority is given to the A channel when accessing the A channel and the B channel, and when the A channel requests the use of the bus, it is processed according to the bus cycle. When there is a request to use the bus from the B channel, And the bus can be used in the B channel only when the use of the bus of the A channel is terminated.

Description

Bus control method of a multiprocessor system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제3도는 본 발명이 적용되는 다중처리기 시스템 구성도, 제4도는 제3도의 각부 상세 구성도로서, (가),(나)는 버스 제어기 상세 구성도이고, (다)는 버스 요청기 상세 구성도이다.FIG. 3 is a block diagram of a multiprocessor system to which the present invention is applied, FIG. 4 and FIG. 3 are detailed diagrams of respective parts, .

Claims

A first step of assigning priority to channel A when a B channel between A channels is accessed; A second step of requesting an address bus to the system bus and setting a channel use bit when a bus use request signal is generated from the channel A; A third step of sequentially driving the address bus and the data bus after acquiring the system bus use right, searching the state bus for a write cycle, retrieving a data acknowledge signal output from the memory if the state is an ok state, If it is determined that the data is not applied until the watchdog timer out occurs, terminating the process if the data is not normally supplied from the memory; A fifth step of retrying if the Snack, Busy and Dirty states are driven as a result of the state bus search, setting the A channel conventional flag and terminating; If the bus use request signal is generated from the B channel, searching the use flag of the A channel to search for the progress of the A channel; If the A channel abort flag is detected and if the A channel abort flag is set, the seventh process is terminated without driving the abrq on the bus when the A channel abort flag is set, The bus control method of the multiprocessor system.

※ Note: It is disclosed by the contents of the first application.