KR970060484A - Non-volatile memory cell manufacturing method - Google Patents

Non-volatile memory cell manufacturing method Download PDF

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Publication number
KR970060484A
KR970060484A KR1019960000702A KR19960000702A KR970060484A KR 970060484 A KR970060484 A KR 970060484A KR 1019960000702 A KR1019960000702 A KR 1019960000702A KR 19960000702 A KR19960000702 A KR 19960000702A KR 970060484 A KR970060484 A KR 970060484A
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KR
South Korea
Prior art keywords
forming
oxide film
region
polysilicon layer
memory cell
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Application number
KR1019960000702A
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Korean (ko)
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KR100199369B1 (en
Inventor
김명섭
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019960000702A priority Critical patent/KR100199369B1/en
Publication of KR970060484A publication Critical patent/KR970060484A/en
Application granted granted Critical
Publication of KR100199369B1 publication Critical patent/KR100199369B1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 플로팅 게이트와 컨트롤 게이트와의 커플링비를 증가시킬 수 있도록 하므로써 프로그램이나 이레이즈시의 효율을 향상시키고, 칩 크기를 작게 할 수 있는 비휘발성 메모리 소자 제조 방법이 개시된다.Disclosed is a nonvolatile memory device manufacturing method capable of increasing a coupling ratio between a floating gate and a control gate so as to improve the efficiency of programming and erasure and to reduce the chip size.

Description

비휘발성 메모리 셀 제조 방법Non-volatile memory cell manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2A도 내지 제2E도는 본 발명의 제1실시예에 따른 비휘발성 메모리 셀 제조 방법을 설명하기 위한 단면도.2A to 2E are sectional views for explaining a method of manufacturing a nonvolatile memory cell according to a first embodiment of the present invention.

Claims (3)

비휘발성 메모리 셀 제조 방법에 있어서, 실리콘 기판의 선택된 영역에 드레인 영역을 형성한 후, 상기 실리콘 기판상에 활성 영역과 비휘발성 영역을 구분하는 필드 산화막을 형성하는 단계와, 상기 활성 영역상에터널 산화막을 성장시킨 후, 제1폴리 실리콘 층, 하부 산화막 및 질화막 패턴을 순차적으로 형성하는 단계와,상기 필드 산화막의 일부를 제거하는 단계와, 상기 필드 산화막이 제거된 영역의 하부 실리콘 기판에 소오스 영역을 형성하는 단계와, 상기 제1폴리 실리콘층, 하부 산화막 및 질화막 패턴 상부에 상부 산화막 패턴을 형성하는 단계와, 상기 전체 구조 상부에 선택 트래지스터의 게이트 산화막 역할을 하는 게이트 산화막을 형성하는 단계와, 상기 전체 구조 상부에 제2폴리 실리콘층을 형성하는 단계로 이루어지는 것을 특징으로 하는 비휘발성 메모리 셀 제조 방법.A method for fabricating a nonvolatile memory cell, the method comprising: forming a field oxide layer on a silicon substrate, the field oxide layer separating an active region and a nonvolatile region from each other; Forming a first polysilicon layer, a lower oxide film, and a nitride film pattern sequentially after the oxide film is grown; removing a portion of the field oxide film; Forming an upper oxide film pattern on the first polysilicon layer, a lower oxide film, and a nitride film pattern; forming a gate oxide film serving as a gate oxide film of the selective transistor on the entire structure; , And forming a second polysilicon layer on the entire structure Method of manufacturing a nonvolatile memory cell. 제1항에 있어서, 상기 소오스 영역은 As 이온을 주입하여 형성하는 것을 특징으로 하는 비휘발성 메모리 셀 제조 방법.2. The method of claim 1, wherein the source region is formed by implanting As ions. 비휘발성 메모리 셀 제조 방법에 있어서, 실리콘 기판상의 선택된 영역에 소오스 및 드레인 영역을 형성한 후, 활성 영역과 비활성 영역을 구분하는 필드 산화막을 형성하는 단계와, 상기 활성 영역상에 터널 산화막을 성장하고, 상기 전체 구조 상부에 제1폴리 실리콘층 패턴을 형성하는 단계와, 상기 소오스 및 드레인 영역상의 필드 산화막을 제거하는 단계와, 상기 전체 구조 상부에 ONO층을 형성하는 단계와, 상기 전체 구조 상부에 제2폴리 실리콘층을 형성하는 단계로 이루어지는 것을 특징으로 하는 비휘발성 메모리 셀 제조 방법.A method for fabricating a nonvolatile memory cell, the method comprising: forming a source and a drain region in a selected region of a silicon substrate; forming a field oxide layer separating the active region and the inactive region; growing a tunnel oxide layer on the active region Forming a first polysilicon layer pattern over the entire structure; removing a field oxide film on the source and drain regions; forming an ONO layer over the entire structure; And forming a second polysilicon layer on the second polysilicon layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960000702A 1996-01-16 1996-01-16 Manufacture of nonvolatile memory cell KR100199369B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960000702A KR100199369B1 (en) 1996-01-16 1996-01-16 Manufacture of nonvolatile memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960000702A KR100199369B1 (en) 1996-01-16 1996-01-16 Manufacture of nonvolatile memory cell

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KR970060484A true KR970060484A (en) 1997-08-12
KR100199369B1 KR100199369B1 (en) 1999-06-15

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100477549B1 (en) * 2002-06-27 2005-03-18 동부아남반도체 주식회사 Method of forming flash memory cell
US7259430B2 (en) 2004-03-16 2007-08-21 Samsung Electronics Co., Ltd Non-volatile memory device and method of manufacturing the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7371638B2 (en) 2004-05-24 2008-05-13 Samsung Electronics Co., Ltd. Nonvolatile memory cells having high control gate coupling ratios using grooved floating gates and methods of forming same
KR100621628B1 (en) 2004-05-31 2006-09-19 삼성전자주식회사 Non-volatile memory cells and methods of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100477549B1 (en) * 2002-06-27 2005-03-18 동부아남반도체 주식회사 Method of forming flash memory cell
US7259430B2 (en) 2004-03-16 2007-08-21 Samsung Electronics Co., Ltd Non-volatile memory device and method of manufacturing the same

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Publication number Publication date
KR100199369B1 (en) 1999-06-15

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