KR970054386A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR970054386A
KR970054386A KR1019950055684A KR19950055684A KR970054386A KR 970054386 A KR970054386 A KR 970054386A KR 1019950055684 A KR1019950055684 A KR 1019950055684A KR 19950055684 A KR19950055684 A KR 19950055684A KR 970054386 A KR970054386 A KR 970054386A
Authority
KR
South Korea
Prior art keywords
polysilicon film
doped polysilicon
semiconductor device
gate
film
Prior art date
Application number
KR1019950055684A
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Korean (ko)
Inventor
안승준
임헌형
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950055684A priority Critical patent/KR970054386A/en
Publication of KR970054386A publication Critical patent/KR970054386A/en

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  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체 장치의 게이트의 막질로서 도핑된 폴리 실리콘막을 사용하여 게이트를 형성하는 방법에 관한 것으로, 도핑된 폴리 실리콘막은 570∼680℃의 온도에서 실시되어 증착 속도가 결정의 성장속도보다 작은 속도로 진행되기 때문에, 상기의 도핑된 폴리 실리콘막은 완전히 다결정 구조를 가지고, 열적 변화에 대한 압력의 변화 및 물리적 특성이 일반적 폴리 실리콘막과 같은 특성을 나타낸다. 또한, 도핑된 폴리 실리콘막을 폴리 실리콘막 대신에 사용하면, 반도체 소자의 제조 과정이 단순해질 뿐만 아니라 박막에 대한 시트 저항의 조절이 매우 용이하기 때문에 게이트의 전기적 특성을 조절하는 데에 많은 이점을 가질 수 있다.The present invention relates to a method of forming a gate using a doped polysilicon film as a film quality of a gate of a semiconductor device, wherein the doped polysilicon film is carried out at a temperature of 570 to 680 ° C so that the deposition rate is smaller than the crystal growth rate. Since the doped polysilicon film has a completely polycrystalline structure, the change in pressure and physical properties with respect to thermal change exhibit the same characteristics as the general polysilicon film. In addition, the use of the doped polysilicon film in place of the polysilicon film not only simplifies the manufacturing process of the semiconductor device but also makes it very easy to adjust the sheet resistance to the thin film, and thus has many advantages in controlling the electrical characteristics of the gate. Can be.

Description

반도체 장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 내지 제2C는 본 발명의 실시예에 따라 반도체 장치를 제조하는 공정들을 보여주는 단면도.2A through 2C are cross-sectional views illustrating processes for manufacturing a semiconductor device in accordance with an embodiment of the present invention.

Claims (2)

활성 영역과 비활성 영역이 반도체 기판(100)상에 개이트 산화막(15)을 형성하는 공정과, 상기의 게이트 산화막(115)상에 인시튜 도핑된 폴리 실리콘막을 570∼680℃의 온도에서 증착하는 공정과, 상기의 인시튜 도핑된 폴리 실리콘막상에 고온 산화막(130)을 형성하는 공정과, 상기의 고온 산화막(130) 및 인시튜 도핑된 폴리 실리콘막을 선택적으로 식각하므로써 게이트(120a)를 형성하는 공정을 포함하는 것을 특징으로 하는 반도체 장치의 제조방법.A process of forming a gate oxide film 15 on the semiconductor substrate 100 in an active region and an inactive region, and depositing an in-situ doped polysilicon film on the gate oxide film 115 at a temperature of 570 to 680 ° C. Forming a high temperature oxide film 130 on the in-situ doped polysilicon film, and selectively etching the high temperature oxide film 130 and the in-situ doped polysilicon film to form a gate 120a. A method of manufacturing a semiconductor device, comprising the step. 제1항에 있어서, 상기의 인시튜 도핑된 폴리 실리콘막을 증착하기 위한 입력, 온도, 가스 플로우양을 조절하여 도핑된 폴리 실리콘막의 증착 속도가 결정의 성장 속도보다 작도록 하는 것을 특징으로 하는 반도체 장치의 제조방법.The semiconductor device according to claim 1, wherein the deposition rate of the doped polysilicon film is smaller than the crystal growth rate by adjusting the input, temperature, and gas flow amount for depositing the in-situ doped polysilicon film. Manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950055684A 1995-12-23 1995-12-23 Manufacturing Method of Semiconductor Device KR970054386A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950055684A KR970054386A (en) 1995-12-23 1995-12-23 Manufacturing Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950055684A KR970054386A (en) 1995-12-23 1995-12-23 Manufacturing Method of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR970054386A true KR970054386A (en) 1997-07-31

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950055684A KR970054386A (en) 1995-12-23 1995-12-23 Manufacturing Method of Semiconductor Device

Country Status (1)

Country Link
KR (1) KR970054386A (en)

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