KR940008011A - Gate oxide film deposition method - Google Patents
Gate oxide film deposition method Download PDFInfo
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- KR940008011A KR940008011A KR1019920015858A KR920015858A KR940008011A KR 940008011 A KR940008011 A KR 940008011A KR 1019920015858 A KR1019920015858 A KR 1019920015858A KR 920015858 A KR920015858 A KR 920015858A KR 940008011 A KR940008011 A KR 940008011A
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- KR
- South Korea
- Prior art keywords
- oxide film
- gate oxide
- deposition method
- cvd
- film deposition
- Prior art date
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Abstract
본 발명은 SiO2증착방법에 관한 것으로, 특히 TFT(Thin Film Transistor)의 게이트 산화막의 전기적 물성을 향상시키는 게이트 산화막 증착방법에 관한 것으로, 폴리실리콘(6)상에 제1CVD게이트산화막(7)을 예정된 두께의 일부를 증착 시키는 제1단계, 상기 제1단계 후에 저압, 고온에서 열처리하는 제2단계, 및 상기 제2단계 후에 제2CVD 게이트 산화막(8)을 증착 하여 게이트산화막을 형성 하여 이루어져 두개의 층으로 게이트 산화막을 형성하게 됨으로써 단일 층으로 형성될때 형성 되어지는 미세구멍의 길이를 짧게 유지하게 되어 TFT의 층간 단락을 방지할 수 있고 따라서 소자의 특성을 유지할 수 있는 효과가 있는 게이트 산화막 증착방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a SiO 2 deposition method, and more particularly, to a gate oxide deposition method for improving electrical properties of a gate oxide film of a TFT (Thin Film Transistor), wherein a first CVD gate oxide film 7 is formed on a polysilicon 6. A first step of depositing a portion of a predetermined thickness, a second step of heat treatment at a low pressure and a high temperature after the first step, and a second oxide gate oxide film 8 is deposited to form a gate oxide film after the second step. By forming a gate oxide film as a layer, it is possible to keep the length of the micropores formed when a single layer is formed to be short, thereby preventing the short-circuit between TFTs and thus maintaining the characteristics of the device. It is about.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 일실시예에 따른 SiO2증착 공정도.Figure 2 is a SiO 2 deposition process in accordance with an embodiment of the present invention.
제3도는 본 발명의 다른 실시예에 따른 SiO2증착 공정도.Figure 3 is a SiO 2 deposition process in accordance with another embodiment of the present invention.
제4도는 본 발명의 또 다른 실시예에 따른 SiO2증착 공정도.Figure 4 is a SiO 2 deposition process in accordance with another embodiment of the present invention.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920015858A KR940008011A (en) | 1992-09-01 | 1992-09-01 | Gate oxide film deposition method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920015858A KR940008011A (en) | 1992-09-01 | 1992-09-01 | Gate oxide film deposition method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR940008011A true KR940008011A (en) | 1994-04-28 |
Family
ID=67147662
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019920015858A KR940008011A (en) | 1992-09-01 | 1992-09-01 | Gate oxide film deposition method |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR940008011A (en) |
-
1992
- 1992-09-01 KR KR1019920015858A patent/KR940008011A/en not_active Application Discontinuation
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