KR970054209A - Transistors and Mask ROM Manufacturing Method Using the Transistors - Google Patents

Transistors and Mask ROM Manufacturing Method Using the Transistors Download PDF

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Publication number
KR970054209A
KR970054209A KR1019950062129A KR19950062129A KR970054209A KR 970054209 A KR970054209 A KR 970054209A KR 1019950062129 A KR1019950062129 A KR 1019950062129A KR 19950062129 A KR19950062129 A KR 19950062129A KR 970054209 A KR970054209 A KR 970054209A
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KR
South Korea
Prior art keywords
silicon substrate
transistors
forming
oxide film
buried oxide
Prior art date
Application number
KR1019950062129A
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Korean (ko)
Inventor
황준
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950062129A priority Critical patent/KR970054209A/en
Publication of KR970054209A publication Critical patent/KR970054209A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 반도체 소자의 트랜지스터 제조방법에 있어서, 상기 실리콘 기판 상에 버퍼(buffer) 역할을 하는 회생산화막(2)을 소정 두께 형성하는 단계; O+이온을 상기 실리콘 기판에 주입하고 어닐링(annealing)하여 상기 실리콘 기판(1) 내에 형성되는 베리드(buried) 산화막 (3)을 형성하는 단계; 및 상기 베리드 산화막(3) 상에 형성되는 실리콘 기판(1) 상에 트랜지스터를 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법에 관한 것이다.According to an aspect of the present invention, there is provided a method of manufacturing a transistor of a semiconductor device, the method comprising: forming a reproducing film (2) having a predetermined thickness on a silicon substrate; Implanting and annealing O + ions into the silicon substrate to form a buried oxide film (3) formed in the silicon substrate (1); And forming a transistor on the silicon substrate (1) formed on the buried oxide film (3).

Description

트랜지스터 및 그 트랜지스터를 이용한 마스크 롬 제조방법Transistors and Mask ROM Manufacturing Method Using the Transistors

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 SOI 구조 형성을 설명하는 공정 단면도.1 is a cross-sectional view illustrating the formation of an SOI structure in accordance with the present invention.

Claims (2)

반도체 소자의 트랜지스터 제조방법에 있어서, 상기 실리콘 기판 상에 버퍼(buffer) 역할을 하는 회생산화막을 소정 두께 형성하는 단계; O+이온을 상기 실리콘 기판에 주입하고 어닐링(annealing)하여 상기 실리콘 기판 내에 형성되는 베리드(buried) 산화막을 형성하는 단계; 및 상기 베리드 산화막 상에 형성되는 실리콘 기판 상에 트랜지스터를 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 트랜지스터 제조방법.A method of manufacturing a transistor of a semiconductor device, comprising: forming a reproducing film on a silicon substrate to serve as a buffer; Implanting and annealing O + ions into the silicon substrate to form a buried oxide film formed in the silicon substrate; And forming a transistor on a silicon substrate formed on the buried oxide film. 반도체 소자의 마스크 롬 제조방법에 있어서, 상기 실리콘 기판 상에 버퍼 역할을 하는 희생산화막을 소정 두께 형성하는 단계; O+이온을 상기 실리콘 기판에 주입하고 어닐링하여 상기 실리콘 기판 내에 형성되는 베리드 산화막을 형성하는 단계; 상기 희생산화막을 제거하고 게이트 산화막과 게이트 전극을 차례로 형성하는 단계; 및 상기 베리드 산화막 상에 형성되는 실리콘 기판 상에 불순물 이온을 주입하여 소오스/드레인 을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 마스크 롬 제조방법.A method of manufacturing a mask ROM of a semiconductor device, the method comprising: forming a sacrificial oxide film serving as a buffer on a silicon substrate; Implanting and annealing O + ions into the silicon substrate to form a buried oxide film formed in the silicon substrate; Removing the sacrificial oxide layer and sequentially forming a gate oxide layer and a gate electrode; And implanting impurity ions onto the silicon substrate formed on the buried oxide layer to form a source / drain. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950062129A 1995-12-28 1995-12-28 Transistors and Mask ROM Manufacturing Method Using the Transistors KR970054209A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950062129A KR970054209A (en) 1995-12-28 1995-12-28 Transistors and Mask ROM Manufacturing Method Using the Transistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950062129A KR970054209A (en) 1995-12-28 1995-12-28 Transistors and Mask ROM Manufacturing Method Using the Transistors

Publications (1)

Publication Number Publication Date
KR970054209A true KR970054209A (en) 1997-07-31

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950062129A KR970054209A (en) 1995-12-28 1995-12-28 Transistors and Mask ROM Manufacturing Method Using the Transistors

Country Status (1)

Country Link
KR (1) KR970054209A (en)

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