KR970053544A - Semiconductor device with dummy metal pattern - Google Patents

Semiconductor device with dummy metal pattern Download PDF

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Publication number
KR970053544A
KR970053544A KR1019950057112A KR19950057112A KR970053544A KR 970053544 A KR970053544 A KR 970053544A KR 1019950057112 A KR1019950057112 A KR 1019950057112A KR 19950057112 A KR19950057112 A KR 19950057112A KR 970053544 A KR970053544 A KR 970053544A
Authority
KR
South Korea
Prior art keywords
metal pattern
semiconductor device
dummy metal
region
pattern density
Prior art date
Application number
KR1019950057112A
Other languages
Korean (ko)
Inventor
최화일
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950057112A priority Critical patent/KR970053544A/en
Publication of KR970053544A publication Critical patent/KR970053544A/en

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

본 발명은 더미메탈패턴이 형성된 반도체 장치에 관해 게시한다. 종래의 반도체 장치는 메탈패턴밀도가 낮은 영역은 과식각되는 현상이 발생할 수 있었다. 그러나 본 발명에서는 메탈패턴밀도가 낮은 영역이 과식각되는 현상을 방지하기 위하여 메탈패턴밀도가 낮은 영역에 더미메탈패턴을 형성함으로써 반도체 장치내의 메틸패턴밀도를 균등하게 하여 부분적으로 과식각되는 현상을 방지할 수 있다.The present invention discloses a semiconductor device in which a dummy metal pattern is formed. In the conventional semiconductor device, a region where the metal pattern density is low may be overetched. However, in the present invention, in order to prevent overetching of a region having a low metal pattern density, a dummy metal pattern is formed in a region having a low metal pattern density to equalize methyl pattern density in a semiconductor device, thereby preventing partial overetching. can do.

Description

더미메탈패턴(Dummy Metal Pattern)을 갖는 반도체 장치Semiconductor device with dummy metal pattern

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 의하여 더미메탈패턴을 갖는 반도체 장치의 평면도이다.2 is a plan view of a semiconductor device having a dummy metal pattern according to the present invention.

Claims (1)

메탈패턴밀도가 낮은 영역에 형성된 더미메탈패턴을 갖는 것을 특징으로 하는 반도체 장치.A semiconductor device comprising a dummy metal pattern formed in a region having a low metal pattern density. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950057112A 1995-12-26 1995-12-26 Semiconductor device with dummy metal pattern KR970053544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950057112A KR970053544A (en) 1995-12-26 1995-12-26 Semiconductor device with dummy metal pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950057112A KR970053544A (en) 1995-12-26 1995-12-26 Semiconductor device with dummy metal pattern

Publications (1)

Publication Number Publication Date
KR970053544A true KR970053544A (en) 1997-07-31

Family

ID=66618993

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950057112A KR970053544A (en) 1995-12-26 1995-12-26 Semiconductor device with dummy metal pattern

Country Status (1)

Country Link
KR (1) KR970053544A (en)

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