KR970053069A - Method of manufacturing MOS field effect transistor - Google Patents
Method of manufacturing MOS field effect transistor Download PDFInfo
- Publication number
- KR970053069A KR970053069A KR1019950069567A KR19950069567A KR970053069A KR 970053069 A KR970053069 A KR 970053069A KR 1019950069567 A KR1019950069567 A KR 1019950069567A KR 19950069567 A KR19950069567 A KR 19950069567A KR 970053069 A KR970053069 A KR 970053069A
- Authority
- KR
- South Korea
- Prior art keywords
- forming
- semiconductor substrate
- pad nitride
- nitride film
- field effect
- Prior art date
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- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
본 발명은 모오스 전계 효과 트랜지스터 제조 방법에 관한 것으로, 특히, 반도체 기판 내로 산소 이온을 주입하여 소자 분리가 이루어진 모오스 전계 효과 트랜지스터 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MOS field effect transistor, and more particularly, to a method for manufacturing a MOS field effect transistor in which oxygen ions are injected into a semiconductor substrate and device isolation is performed.
본 발명은 반도체 기판상에 패드 질화막을 증착하는 단계; 패드 질화막 상에 감광막 패턴을 형성하는 단계; 감광막 패턴에 의해 국한된 반도체 기판 내로 산소 이온을 주입하는 단계; 열공정을 통해 산소 이온 주입된 반도체 기판 영역에 소자 분리 산화막을 형성하는 단계; 패드 질화막을 제거하는 단계; 게이트 산화막을 형성하는 단계; 게이트 전극을 형성하는 단계; 저농도 이온 주입으로 LDD를 형성하는 단계 및 스페이서 및 고농도 소오스, 드레인 영역을 형성하는 단계를 포함하는 것을 특징으로 한다.The present invention comprises the steps of depositing a pad nitride film on a semiconductor substrate; Forming a photoresist pattern on the pad nitride film; Implanting oxygen ions into the semiconductor substrate confined by the photoresist pattern; Forming a device isolation oxide film on the semiconductor substrate region implanted with oxygen ions through a thermal process; Removing the pad nitride film; Forming a gate oxide film; Forming a gate electrode; Forming LDD by low concentration ion implantation and forming a spacer and a high concentration source, drain region.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제2도 (가) 내지 (아)는 본 발명에 따른 반도체 소자의 소자 분리 방법에 의해 형성되는 모오스 전계 효과 트랜지스터 제조 방법을 설명하기 위한 공정흐름도.2 (a) to (h) are process flow diagrams for explaining a method for manufacturing a MOS field effect transistor formed by a device isolation method of a semiconductor device according to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950069567A KR970053069A (en) | 1995-12-30 | 1995-12-30 | Method of manufacturing MOS field effect transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950069567A KR970053069A (en) | 1995-12-30 | 1995-12-30 | Method of manufacturing MOS field effect transistor |
Publications (1)
Publication Number | Publication Date |
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KR970053069A true KR970053069A (en) | 1997-07-29 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950069567A KR970053069A (en) | 1995-12-30 | 1995-12-30 | Method of manufacturing MOS field effect transistor |
Country Status (1)
Country | Link |
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KR (1) | KR970053069A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10379866B2 (en) | 2016-09-19 | 2019-08-13 | Samsung Electronics Co., Ltd | Electronic apparatus, VLIW processor and control methods for updating a multi-cycle no operation (NOP) instruction |
-
1995
- 1995-12-30 KR KR1019950069567A patent/KR970053069A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10379866B2 (en) | 2016-09-19 | 2019-08-13 | Samsung Electronics Co., Ltd | Electronic apparatus, VLIW processor and control methods for updating a multi-cycle no operation (NOP) instruction |
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