KR970052780A - 반도체 소자 제조 방법 - Google Patents

반도체 소자 제조 방법 Download PDF

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Publication number
KR970052780A
KR970052780A KR1019950046303A KR19950046303A KR970052780A KR 970052780 A KR970052780 A KR 970052780A KR 1019950046303 A KR1019950046303 A KR 1019950046303A KR 19950046303 A KR19950046303 A KR 19950046303A KR 970052780 A KR970052780 A KR 970052780A
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KR
South Korea
Prior art keywords
photoresist
semiconductor device
patterned
device manufacturing
blanket
Prior art date
Application number
KR1019950046303A
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English (en)
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KR0168150B1 (ko
Inventor
김천수
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950046303A priority Critical patent/KR0168150B1/ko
Publication of KR970052780A publication Critical patent/KR970052780A/ko
Application granted granted Critical
Publication of KR0168150B1 publication Critical patent/KR0168150B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
    • H01L21/31056—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching the removal being a selective chemical etching step, e.g. selective dry etching through a mask
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70641—Focus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

본 발명은 토포로지 단차가 큰 소자를 단차가 낮은 영역의 포토레지스트는 노광 장치의 포커스(Focus)를 맞춰 패터닝하고 상대적으로 단차가 높은 영역의 포토레지스트는 디포커스(DeFocus)를 발생시켜 패터닝이 형성이 되지 않게 하여 평탄화시키므로서 소자의 평탄화를 높이고, 공정 시간의 단축 및 공정의 단순화를 할 수 있도록 한 반도체 소자 제조 방법이 개시된다.

Description

반도체 소자 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1a 내지 1e도는 본 발명에 따른 반도체 소자 제조 방법을 설명하기 위한 단면도.
* 도면의 주요부분에 대한 부호의 설명
1 : 실리콘 기판 2 : 전도성 패턴
3 : 절연층 4 : 포토레지스트
5 : SOG막

Claims (3)

  1. 반도체 소자 제조 방법에 있어서, 실리콘 기판(1)상에 소정의 전도성 패턴(2)이 형성되고 전도성 패턴(2)을 포함한 절연층(3) 및 포토레지스트(4)가 순차적으로 형성하는 단계와, 상기 포토레지스트는 블랭킷 스트립 마스크(Blanket Stripe Mask)를 이용하여 노광에 의해 패터닝 되는 단계와, 상기 SiO2층은 엣치-백(Etch-Back)공정으로 SiO2층의 일부분이 식각된 후 패터닝 된 포토레지스트를 제거하는 단계와, 상기 전체 구조 상부에 SOG(Spin On Glass)막을 도포하는 단계와, 상기 SOG막이 엣치-백(Etch-Back)공정으로 전체 상부면을 평탄화 시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자 제조 방법.
  2. 제1항에 있어서, 상기 포토로지 단차가 낮은 영역의 포토레지스트는 노광 장치의 포커스(Focus)를 맞춰 패터닝하고 상대적으로 단차가 높은 영역의 포토레지스트는 디포커스(DeFocus)를 유발시켜 패턴이 형성 되지 않게 하는 것을 특징으로 하는 반도체 소자 제조 방법.
  3. 제1항에 있어서 상기 블랭킷 스트립 마스크의 패턴 라인 폭은 토포로지 단차와 같은 크기로 만드는 것을 특징으로 하는 반도체 소자 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950046303A 1995-12-04 1995-12-04 반도체 소자 제조 방법 KR0168150B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950046303A KR0168150B1 (ko) 1995-12-04 1995-12-04 반도체 소자 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950046303A KR0168150B1 (ko) 1995-12-04 1995-12-04 반도체 소자 제조 방법

Publications (2)

Publication Number Publication Date
KR970052780A true KR970052780A (ko) 1997-07-29
KR0168150B1 KR0168150B1 (ko) 1999-02-01

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ID=19437524

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950046303A KR0168150B1 (ko) 1995-12-04 1995-12-04 반도체 소자 제조 방법

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KR (1) KR0168150B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160029900A (ko) 2014-09-05 2016-03-16 삼성전자주식회사 반도체 소자의 제조 방법

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KR0168150B1 (ko) 1999-02-01

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