KR970051161A - Word line drive - Google Patents

Word line drive Download PDF

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Publication number
KR970051161A
KR970051161A KR1019950049980A KR19950049980A KR970051161A KR 970051161 A KR970051161 A KR 970051161A KR 1019950049980 A KR1019950049980 A KR 1019950049980A KR 19950049980 A KR19950049980 A KR 19950049980A KR 970051161 A KR970051161 A KR 970051161A
Authority
KR
South Korea
Prior art keywords
word line
source
gate
signal
line driving
Prior art date
Application number
KR1019950049980A
Other languages
Korean (ko)
Other versions
KR0179776B1 (en
Inventor
유민형
Original Assignee
문정환
Lg 반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, Lg 반도체주식회사 filed Critical 문정환
Priority to KR1019950049980A priority Critical patent/KR0179776B1/en
Publication of KR970051161A publication Critical patent/KR970051161A/en
Application granted granted Critical
Publication of KR0179776B1 publication Critical patent/KR0179776B1/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)

Abstract

본 발명은 반도체 칩내부의 워드라인 구동장치에 관한 것으로, 비트 신호를 게이트로 인가받아 워드라인 구동 입력신호를 전달하는 트랜지스터의 게이트 노드의 전압 증폭도 및 게이트 커패시턴스를 줄여 워드라인을 고속동작시키는데 목적이 있는 것으로, 이와같은 목적은 워드라인 구동 입력신호를 드레인으로 인가받으며 소오스는 인버터의 입력단과 접속된 제1엔모스 트랜지스터와, 상기 제1엔모스 트랜지스터의 소오스에 입력단이 연결되어 입력되는 신호를 반전시킴으로써 워드라인 구동 출력신호를 출력하는 상기 인버터와, 드레인은 전원전압과 연결되고, 게이트는 접지전위에 연결되며 소오스는 상기 제1엔모스 트랜지스터의 소오스와 인버터의 입력단 사이에 연결된 피모스 트랜지스터로 구성된 워드라인 구동장치에 있어서, 드레인은 비트신호를 인가받으며 게이트는 접지전위에 연결되고, 소오스는 상기 제1엔모스 트랜지스터의 게이트로 접속된 제2피모스 트랜지스터를 더 포함하여 구성함으로써 달성되는 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a word line driving device in a semiconductor chip. The present invention relates to a high-speed operation of a word line by reducing a voltage amplification degree and gate capacitance of a gate node of a transistor that receives a bit signal as a gate and transfers a word line driving input signal. The purpose of this is to receive a word line driving input signal as a drain, and the source includes a first NMOS transistor connected to an input terminal of an inverter and a signal connected to an input terminal of a source of the first NMOS transistor. The inverter outputs a word line driving output signal by inverting, a drain is connected to a power supply voltage, a gate is connected to a ground potential, and a source is a PMOS transistor connected between a source of the first NMOS transistor and an input terminal of the inverter. In a configured word line driver, the drain is non- Receive applying a gate signal is connected to the ground potential, a source will be achieved by further comprising a second PMOS transistor connected to the gate of the MOS transistor of the first yen.

Description

워드라인 구동장치Word line drive

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 워드라인 구동장치의 상세 회로도.3 is a detailed circuit diagram of the word line driver of the present invention.

Claims (1)

워드라인 구동 입력신호를 드레인으로 인가받으며 소오스는 인버터의 입력단과 접속된 제1엔모스 트랜지스터와, 상기 제1엔모스 트랜지스터의 소오스에 입력단이 연결되어 입력되는 신호를 반전시킴으로써 워드라인 구동 출력신호를 출력하는 상기 인버터와, 드레인으로 전원전압과 연결되고, 게이트는 접지전위에 연결되며 소오스는 제1엔모스 트랜지스터의 소오스와 인버터의 입력단 사이에 연결된 피모스 트랜지스터로 구성된 워드라인 구동장치에 있어서, 드레인은 비트신호를 인가받으며 게이트는 접지전위에 연결되고, 소오스는 상기 제1엔모스 트랜지스터의 게이트로 접속된 제2피모스 트랜지스터를 더 포함하여 구성한 것을 특징으로 하는 워드라인 구동장치.The word line driving input signal is applied as a drain, and the source inverts the input signal connected to the first NMOS transistor connected to the input terminal of the inverter and the source of the first NMOS transistor to invert the input signal. A word line driving device comprising a PMOS transistor connected between a source of the inverter and a power source voltage connected to a drain, a gate connected to a ground potential, and a source connected to a source of a first NMOS transistor and an input terminal of the inverter. Is applied with a bit signal, the gate is connected to the ground potential, and the source further comprises a second PMOS transistor connected to the gate of the first NMOS transistor. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950049980A 1995-12-14 1995-12-14 Word line drive device KR0179776B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950049980A KR0179776B1 (en) 1995-12-14 1995-12-14 Word line drive device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950049980A KR0179776B1 (en) 1995-12-14 1995-12-14 Word line drive device

Publications (2)

Publication Number Publication Date
KR970051161A true KR970051161A (en) 1997-07-29
KR0179776B1 KR0179776B1 (en) 1999-04-15

Family

ID=19440138

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950049980A KR0179776B1 (en) 1995-12-14 1995-12-14 Word line drive device

Country Status (1)

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KR (1) KR0179776B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210036457A (en) 2019-09-25 2021-04-05 삼성전자주식회사 Memory device and operating method of memory device

Also Published As

Publication number Publication date
KR0179776B1 (en) 1999-04-15

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