KR970050696A - Head Selection Circuit of Floppy Disk Drive System - Google Patents

Head Selection Circuit of Floppy Disk Drive System Download PDF

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Publication number
KR970050696A
KR970050696A KR1019950049159A KR19950049159A KR970050696A KR 970050696 A KR970050696 A KR 970050696A KR 1019950049159 A KR1019950049159 A KR 1019950049159A KR 19950049159 A KR19950049159 A KR 19950049159A KR 970050696 A KR970050696 A KR 970050696A
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KR
South Korea
Prior art keywords
signal
flip
flop
level
block selection
Prior art date
Application number
KR1019950049159A
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Korean (ko)
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KR0174495B1 (en
Inventor
문병기
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950049159A priority Critical patent/KR0174495B1/en
Publication of KR970050696A publication Critical patent/KR970050696A/en
Application granted granted Critical
Publication of KR0174495B1 publication Critical patent/KR0174495B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B19/00—Driving, starting, stopping record carriers not specifically of filamentary or web form, or of supports therefor; Control thereof; Control of operating function ; Driving both disc and head
    • G11B19/02—Control of operating function, e.g. switching from recording to reproducing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B33/00—Constructional parts, details or accessories not provided for in the other groups of this subclass
    • G11B33/12—Disposition of constructional parts in the apparatus, e.g. of power supply, of modules
    • G11B33/121—Disposition of constructional parts in the apparatus, e.g. of power supply, of modules the apparatus comprising a single recording/reproducing device
    • G11B33/122—Arrangements for providing electrical connections, e.g. connectors, cables, switches

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  • Digital Magnetic Recording (AREA)

Abstract

본 발명은 플로피 디스크 구동 시스템의 헤드 선택회로를 공개한다. 그 회로는 제1 및 2플립플롭 신호에 따라 두개의 헤드 중 하나를 선택하고, 제1 및 2제어신호에 따라 두 개의 사이드중 하나를 선택하는 비교기와, 쓰기 리셋신호를 출력하는 플립플롭과, 제1레벨의 블럭선택신호를 입력하여 제1레벨의 제1플립플롭 신호를 출력하고, 제2레벨의 제2플립플롭 신호를 출력하며, 쓰기 리셋 신호에 응답하여 리셋되는 제1신호발생수단과, 제2레벨의 블록선택신호를 입력하여 제2레벨의 제1플립플롭 신호를 출력하고, 제1레벨의 제2플립플롭 신호를 출력하며, 쓰기 리셋 신호에 응답하여 리셋되는 제2신호발생수단과, 및 블록선택신호를 선택적으로 제1 및 2 신호 발생수단들로 공급하는 블록선택수단으로 구성되고, 제1제어신호 또는 제2제어신호중 하나를 블록선택신호로 선택하는 것을 특징으로 하고, 종래의 헤드 선택회로가 랜덤하게 헤드를 선택하는데 반하여, 간단한 논리회로를 종래의 헤드 선택회로에 부가하여 쓰기 리셋 기능을 수행할 수 있고, 원하는 사이드의 원하는 헤드를 선택할 수 있는 효과가 있다.The present invention discloses a head selection circuit of a floppy disk drive system. The circuit includes a comparator for selecting one of two heads according to the first and second flip-flop signals, a one of two sides according to the first and second control signals, a flip-flop for outputting a write reset signal, First signal generating means for inputting a block selection signal of a first level to output a first flip-flop signal of a first level, a second flip-flop signal of a second level, and reset in response to a write reset signal; Second signal generating means for inputting a block selection signal of a second level to output a first flip-flop signal of a second level, to output a second flip-flop signal of a first level, and to be reset in response to a write reset signal; And block selection means for selectively supplying the block selection signal to the first and second signal generating means, wherein one of the first control signal and the second control signal is selected as the block selection signal. Head selection circuit Whereas in bushes selecting the head, and a simple logic circuit to perform a write reset function in addition to the conventional head selection circuit, there is an effect that it is possible to select the desired head of the desired side.

Description

플로피 디스크 구동 시스템의 헤드 선택 회로Head Selection Circuit of Floppy Disk Drive System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 헤드 선택회로의 블록도이다.2 is a block diagram of a head selection circuit according to the present invention.

Claims (2)

플로피 디스크 구동 시스템의 헤드 선택회로에 있어서, 제1 및 제2플립플롭 신호에 따라 두 개의 헤드 중 하나를 선택하고, 제1 및 2제어신호에 따라 두개의 사이드중 하나를 선택하는 비교기: 쓰기 리셋신호를 출력하는 플립플롭; 블럭선택신호를 입력하여 제1레벨의 상기 제1플립플롭 신호를 출력하고, 제2레벨의 상기 제2플립플롭 신호를 출력하며, 상기 쓰기 리셋 신호에 응답하여 리셋되는 제1신호발생수단; 상기 블럭선택신호를 입력하여 제2레벨의 상기 제1플립플롭 신호를 출력하고, 제1레벨의 상기 제2플립플롭 신호를 출력하며, 상기 쓰기 리셋 신호에 응답하여 리셋되는 제2신호발생수단; 및 상기 블럭선택신호를 선택적으로 상기 제1 및 2신호 발생수단들로 공급하는 블럭선택수단을 구비하고, 제1제어신호 또는 제2제어신호중 하나를 상기 블럭선택신호로 선택하는 것을 특징으로 하는 플로피 디스크 구동 시스템의 헤드 선택회로.In the head selection circuit of a floppy disk drive system, a comparator for selecting one of two heads according to the first and second flip-flop signals and one of two sides according to the first and second control signals: write reset A flip-flop that outputs a signal; First signal generating means for inputting a block selection signal to output the first flip-flop signal at a first level, to output the second flip-flop signal at a second level, and to be reset in response to the write reset signal; Second signal generating means for inputting said block selection signal to output said first flip-flop signal at a second level, to output said second flip-flop signal at a first level, and to reset in response to said write reset signal; And block selection means for selectively supplying the block selection signal to the first and second signal generating means, wherein one of the first control signal and the second control signal is selected as the block selection signal. Head selection circuit of disc drive system. 제1항에 있어서, 상기 제1 또는 제2 신호 발생수단은 상기 블록 선택신호를 클럭입력하고, 상기 쓰기 리셋 신호를 리셋단자로 입력하고, 제1레벨을 데이터 입력하는 D플립플롭; 상기 D플립플롭의 정출력 및 상기 블럭 선택신호를 논리곱하여 상기 제1플립플롭 신호로서 출력하는 논리곱; 및 상기 논리곱의 출력을 반전하여 상기 제2플립플롭 신호로서 출력하는 인버터를 구비하는 것을 특징으로 하는 플로피 디스크 구동 시스템의 헤드 선택회로.2. The apparatus of claim 1, wherein the first or second signal generating means comprises: a D flip-flop which clocks the block selection signal, inputs the write reset signal to a reset terminal, and inputs a first level of data; A logical product of the output of the D flip-flop and the block selection signal; And an inverter for inverting the output of the logical product and outputting the second flip-flop signal as the second flip-flop signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950049159A 1995-12-13 1995-12-13 Head selection circuit for fdd system KR0174495B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950049159A KR0174495B1 (en) 1995-12-13 1995-12-13 Head selection circuit for fdd system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950049159A KR0174495B1 (en) 1995-12-13 1995-12-13 Head selection circuit for fdd system

Publications (2)

Publication Number Publication Date
KR970050696A true KR970050696A (en) 1997-07-29
KR0174495B1 KR0174495B1 (en) 1999-04-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950049159A KR0174495B1 (en) 1995-12-13 1995-12-13 Head selection circuit for fdd system

Country Status (1)

Country Link
KR (1) KR0174495B1 (en)

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KR0174495B1 (en) 1999-04-15

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