KR950006614A - Priority control method for memory usage request and its device - Google Patents

Priority control method for memory usage request and its device Download PDF

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Publication number
KR950006614A
KR950006614A KR1019930017539A KR930017539A KR950006614A KR 950006614 A KR950006614 A KR 950006614A KR 1019930017539 A KR1019930017539 A KR 1019930017539A KR 930017539 A KR930017539 A KR 930017539A KR 950006614 A KR950006614 A KR 950006614A
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KR
South Korea
Prior art keywords
data
control means
signal processing
signal
output
Prior art date
Application number
KR1019930017539A
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Korean (ko)
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KR0176470B1 (en
Inventor
김주선
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019930017539A priority Critical patent/KR0176470B1/en
Publication of KR950006614A publication Critical patent/KR950006614A/en
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Publication of KR0176470B1 publication Critical patent/KR0176470B1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Bus Control (AREA)

Abstract

본 발명에 의한 우선순위 제어회로는 데이터의 신호처리를 위한 제어신호처리를 최우선순위로 처리하여 안정적이고 연속적인 데이터처리를 할 수 있는 이점이 있다.Priority control circuit according to the present invention has the advantage that it is possible to perform a stable and continuous data processing by processing the control signal processing for the signal processing of the data as the highest priority.

Description

메모리사용요구에 대한 우선순위 제어방법 및 그 장치Priority control method for memory usage request and its device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 우선순위제어방법에 따른 순서도,3 is a flow chart according to the priority control method according to the present invention;

제4도는 본 발명에 의한 우선순위제어장치의 블럭도.4 is a block diagram of a priority control apparatus according to the present invention.

Claims (2)

디지털 신호처리 시스템에서 신호처리를 위한 메모리 사용에 대해 우선순위를 제어하기 위한 방법에 있어서, 디지털신호처리를 위한 요구신호에 의해 상기 디지털신호를 수행하는 제1과정; 메모리 데이터를 독출하기 위한 요구신호에 의해 데이터독출을 수행하는 제2과정; 메모리 데이터를 기록하기 위한 요구신호에 의해 데이터기록을 수행하는 제3과정을 포함함을 특징으로 하는 우선순위제어방법.CLAIMS 1. A method for controlling priority for memory usage for signal processing in a digital signal processing system, comprising: a first step of performing the digital signal according to a request signal for digital signal processing; Performing a data read in response to a request signal for reading memory data; And a third step of performing data recording in response to a request signal for recording memory data. 디지탈 신호처리 시스템에서 디지탈신호처리를 제어하며 신호처리를 위한 요구신호를 출력하는 신호처리제어수단과, 데이타의 기록을 제어하며 데이타의 기록을 위한 요구신호를 출력하는 데이타기록제어수단과, 데이타의 독출을 제어하며 데이타의 기록을 제어하며 데이타의 독출을 위한 요구신호를 출력하는 데이타독출제어수단과, 상기 신호처리제어수단과 데이타기록제어수단과 상기 데이타독출제어수단에서 출력되는 요구신호에 우선순위를 부여하기 위한 우선순위제어수단을 구비한 우선순위제어장치에 있어서, 상기 우선순위제어수단이 상기 데이타기록제어수단에서 출력되는 쓰기요구신호를 홀드하기 위한 제1홀드수단과, 상기 데이타독출제어수단에서 출력되는 읽기요구신호를 홀드하기 위한 제2홀드수단과, 상기 신호처리제어수단의 신호처리요구신호에 의해 상기 신호처리제어수단이 데이타를 출력할 수 있게 하는 인에이블신호를 출력하며, 상기 제1홀드수단의 출력에 의해 상기 데이타기록제어수단의 데이타를 출력할 수 있게 하는 인에이블신호를 출력하며, 상기 제2홀드수단의 출력에 의해 메모리가 데이타를 출력할 수 있게 하는 인에이블신호를 출력하는 인에이블신호발생수단으로 구성됨을 특징으로 하는 우선순위제어장치.Signal processing control means for controlling digital signal processing in a digital signal processing system and outputting a request signal for signal processing, data recording control means for controlling the recording of data and outputting a request signal for writing data, and A data read control means for controlling the read and controlling the writing of data and outputting a request signal for reading the data; and a request signal output from the signal processing control means, the data write control means, and the data read control means. A priority control apparatus having priority control means for assigning priority, the priority control means comprising: first hold means for holding a write request signal output from said data write control means, and said data read; Second holding means for holding the read request signal output from the output control means, and the signal processing control means. An enable signal for enabling the signal processing control means to output data in response to a signal processing request signal; an enable signal for outputting data of the data write control means in response to the output of the first hold means; And enable signal generating means for outputting a signal and outputting an enable signal for enabling the memory to output data by the output of the second holding means. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930017539A 1993-08-31 1993-08-31 Control method of priority of memory order KR0176470B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930017539A KR0176470B1 (en) 1993-08-31 1993-08-31 Control method of priority of memory order

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930017539A KR0176470B1 (en) 1993-08-31 1993-08-31 Control method of priority of memory order

Publications (2)

Publication Number Publication Date
KR950006614A true KR950006614A (en) 1995-03-21
KR0176470B1 KR0176470B1 (en) 1999-05-15

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Application Number Title Priority Date Filing Date
KR1019930017539A KR0176470B1 (en) 1993-08-31 1993-08-31 Control method of priority of memory order

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KR (1) KR0176470B1 (en)

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Publication number Publication date
KR0176470B1 (en) 1999-05-15

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