KR970060160A - One-chip circuit for shock control and graphic control - Google Patents

One-chip circuit for shock control and graphic control Download PDF

Info

Publication number
KR970060160A
KR970060160A KR1019960000427A KR19960000427A KR970060160A KR 970060160 A KR970060160 A KR 970060160A KR 1019960000427 A KR1019960000427 A KR 1019960000427A KR 19960000427 A KR19960000427 A KR 19960000427A KR 970060160 A KR970060160 A KR 970060160A
Authority
KR
South Korea
Prior art keywords
data
audio data
graphic
unit
control
Prior art date
Application number
KR1019960000427A
Other languages
Korean (ko)
Other versions
KR100207655B1 (en
Inventor
이용현
이래환
김성식
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960000427A priority Critical patent/KR100207655B1/en
Publication of KR970060160A publication Critical patent/KR970060160A/en
Application granted granted Critical
Publication of KR100207655B1 publication Critical patent/KR100207655B1/en

Links

Classifications

    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
    • G10H1/00—Details of electrophonic musical instruments
    • G10H1/36—Accompaniment arrangements
    • G10H1/361—Recording/reproducing of accompaniment for use with an external source, e.g. karaoke systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10527—Audio or video recording; Data buffering arrangements
    • G11B2020/1062—Data buffering arrangements, e.g. recording or playback buffers
    • G11B2020/10824—Data buffering arrangements, e.g. recording or playback buffers the buffer being used to prevent vibrations or shocks from causing delays

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Electrophonic Musical Instruments (AREA)

Abstract

본 발명은 충격 방지 제어와 그래픽 제어의 원칩 회로에 관한 것이며, 특히 컴팩트 디스크 노래 반주 장치에 사용하는 그래픽 제어와 충격 방지 제어를 원칩화하는 회로에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0002] The present invention relates to a one-chip circuit for an anti-shock control and a graphical control, and more particularly, to a circuit for reducing graphics control and anti-shock control used in a compact disc singing accompaniment apparatus.

본 발명의 목적을 위해 직렬 데이타로 입력되는 오디오 데이타 및 그래픽 데이타를 각각 저장하는 메모리부와, 직렬로 입력되는 오디오 데이타와 상기 메모리부의 내용을 비교하여 오디오 데이타가 계속 입력되는가의 상태 신호를 출력하는 데이타 비교부와, 그래픽 동기 신호를 출력하는 그래픽 동기 발생부, 입력되는 오디오데이타 및 그래픽 데이타를 각각의 타이밍에 의해 상기 메모리부로 저장하고, 데이타 비교부에서의 상태 신호 및 그래픽 동기 발생부의 그래픽 동기 신호에 따라 상기 메모리부에 저장되어 있는 오디오 데이타 및 그래픽 데이타를 제어하는 메모리 제어부를 포함하는 것을 특징으로 한다.A memory unit for storing audio data and graphic data input as serial data for the purpose of the present invention; a memory unit for comparing the contents of the memory unit with audio data input serially, and outputting a status signal indicating whether audio data is continuously input A data comparison unit, a graphic synchronization generating unit for outputting a graphic synchronization signal, audio data to be input and graphics data are stored in the memory unit at respective timings, and a status signal in the data comparison unit and a graphics synchronization signal And a memory control unit for controlling the audio data and the graphic data stored in the memory unit.

상술한 바와 같이 본 발명에 의하면, 충격 방지 기능과 그래픽 제어 기능을 동시에 독립적으로 수행할 수 있고 원칩화에 의해 메모리를 공용으로 사용할 수 있으므로 회로를 단순화 하고 비용을 절감할 수 있다.As described above, according to the present invention, the shock protection function and the graphic control function can be performed independently at the same time, and the memory can be commonly used by one chip, so that the circuit can be simplified and the cost can be reduced.

Description

충격 방지 제어와 그래픽 제어의 원칩회로One-chip circuit for shock control and graphic control

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도는 본 발명의 충격 방지 제어와 그래픽 제어를 원칩화한 씨디 오케이 장치를 도시한 블럭도이다.FIG. 2 is a block diagram showing a CD-R unit having a single chip of the anti-shock control and graphic control of the present invention.

Claims (3)

컴팩트 디스크 노래 반주 장치에서 충격 방지와 그래픽을 각각 제어하는 회로에 있어서, 직렬 데이타로 입력되는 오디오 데이타 및 그래픽 데이타를 각각 저장하는 메모리부; 상기 직렬로 입력되는 오디오 데이타와 상기 메모리부의 내용을 비교하여 오디오 데이타가 계속 입력되는가의 상태 신호를 출력하는 데이타 비교부; 그래픽 동기 신호를 출력하는 그래픽 동기 발생부; 상기 입력되는 오디오 데이타 및 그래픽 데이타를 각각의 타이밍에 의해 상기 메모리부로 저장하고, 상기 데이타 비교부에서의 상태 신호 및 상기 그래픽 동기 발생부의 그래픽 동기 신호에 따라 상기 메로리부에 저장되어 있는 오디오 데이타 및 그래픽 데이타를 제어하는 메모리 제어부를 포함하는 것을 특징으로 하는 충격 방지 제어와 그래픽 제어의 원칩 회로.A circuit for controlling shock and graphics in a compact disc singing accompaniment apparatus, the circuit comprising: a memory unit for storing audio data and graphic data input as serial data, respectively; A data comparing unit for comparing the audio data input in series with the contents of the memory unit and outputting a status signal indicating whether audio data is continuously input; A graphic synchronization generating unit for outputting a graphic synchronization signal; The audio data and the graphics data stored in the memory unit according to a status signal in the data comparison unit and a graphic synchronization signal of the graphic synchronization generation unit, And a memory control unit for controlling the data. 제 1항에 있어서, 상기 메모리부는 오디오 데이타 및 비디오 데이타를 공용으로 저장하는 메모리인 것을 특징으로 하는 충격 방지 제어와 그래픽 제어의 원칩 회로.The one-chip circuit of claim 1, wherein the memory unit is a memory for commonly storing audio data and video data. 제1항에 있어서, 상기 메모리 제어부는 상기 입력되는 오디오 데이타가 중단되면 이전에 기억된 오디오 데이타를 상기 메모리부에서 읽어내는 수단인 것을 특징으로 하는 충격 방지 제어와 그래픽 제어의 원칩 회로.The one-chip circuit of claim 1, wherein the memory control unit is means for reading previously stored audio data from the memory unit when the input audio data is interrupted. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960000427A 1996-01-11 1996-01-11 Compact disc karaoke capable of preventing shock and controlling graphic KR100207655B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960000427A KR100207655B1 (en) 1996-01-11 1996-01-11 Compact disc karaoke capable of preventing shock and controlling graphic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960000427A KR100207655B1 (en) 1996-01-11 1996-01-11 Compact disc karaoke capable of preventing shock and controlling graphic

Publications (2)

Publication Number Publication Date
KR970060160A true KR970060160A (en) 1997-08-12
KR100207655B1 KR100207655B1 (en) 1999-07-15

Family

ID=19449265

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960000427A KR100207655B1 (en) 1996-01-11 1996-01-11 Compact disc karaoke capable of preventing shock and controlling graphic

Country Status (1)

Country Link
KR (1) KR100207655B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100337423B1 (en) * 1996-12-26 2002-11-30 가부시키가이샤 도모에가와 세이시쇼 Adhesive tape for electronic parts

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100337423B1 (en) * 1996-12-26 2002-11-30 가부시키가이샤 도모에가와 세이시쇼 Adhesive tape for electronic parts

Also Published As

Publication number Publication date
KR100207655B1 (en) 1999-07-15

Similar Documents

Publication Publication Date Title
KR970029804A (en) DRAM
KR960025733A (en) DRAM refresh circuit
KR900015434A (en) Signal generator
KR900013396A (en) DRAM controller
KR970060160A (en) One-chip circuit for shock control and graphic control
KR880011795A (en) Semiconductor memory device
KR920003769A (en) Surround control circuit
KR910006909A (en) Display controller
KR970071792A (en) High-speed access method of memory
KR960033054A (en) Mute Circuit of Video Signal
TW259868B (en) Delay circuit
KR980004715A (en) Key Controller with Dynamic Cross Fading
KR830006760A (en) Display device
KR910006971A (en) Carrier output device
KR940020224A (en) DRAM initialization circuit
KR940012145A (en) Redundancy Status Decision Circuit of Redundancy System
KR960011755A (en) Digital signal processing circuit having a plurality of memories
KR950015351A (en) Video Accompaniment System and Its Control Method
KR920004978A (en) Address Expansion Method Using I / O Function of Microprocessor
KR970049578A (en) Memory control circuit
KR950034215A (en) VCR test pattern signal generator
KR960015233A (en) Memory device with the function of cache memory
KR910700499A (en) Data record control means
KR910013886A (en) PWM port expansion method and circuit by microcomputer
KR960001749B1 (en) High speed memory access circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20070328

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee