KR970024483A - A full-wave bridge rectifier circuit - Google Patents

A full-wave bridge rectifier circuit Download PDF

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Publication number
KR970024483A
KR970024483A KR1019950035597A KR19950035597A KR970024483A KR 970024483 A KR970024483 A KR 970024483A KR 1019950035597 A KR1019950035597 A KR 1019950035597A KR 19950035597 A KR19950035597 A KR 19950035597A KR 970024483 A KR970024483 A KR 970024483A
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KR
South Korea
Prior art keywords
terminal
input
output
comparing
voltage
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KR1019950035597A
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Korean (ko)
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KR0173949B1 (en
Inventor
백승범
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김광호
삼성전자 주식회사
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Priority to KR1019950035597A priority Critical patent/KR0173949B1/en
Priority to JP8010454A priority patent/JPH09131064A/en
Priority to CN96107652A priority patent/CN1148288A/en
Publication of KR970024483A publication Critical patent/KR970024483A/en
Application granted granted Critical
Publication of KR0173949B1 publication Critical patent/KR0173949B1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

본 발명은 높은 에너지 효울을 갖는 전파 브리지 정류회로에 관한 것으로, 본 발명의 정류기는 두 개의 PMOS 트랜지스터(MP1, MP2)와, 두 개의 NMOS 트랜지스터(MN1,MN2), 두개의 하이레벨 비교기(COMH1, COMH2), 두개의 로우레벨 비교기(COML1,COML2)로 구성되며, 정류기의 입력단자A로 GND 레벨 이하의 AC 입력이 인가될 때에는 NMOS 트랜지스터 MN1이 ‘턴-온’되어서 입력단자 A는 GND 레벨로 되고, 입력단자 B로 Vdd 레벨 이상의 AC입력이 인가될 때에는 PMOS 트랜지스터 PN2가 ‘턴-온’ 되어서 입력단자 B는 Vdd 레벨로 되므로, 래치-업을 방지할 수 있으며, 더 나아가, 본 발명에 따르면, 소자의 내압에 대해 특별히 고려할 필요가 없게 되며, 약 10V 정도의 내압을 갖는 소자를 제조하는 데 적합한 소자제조공정에 의해 제조될 수 있다.The present invention relates to a full-wave bridge rectifier circuit having high energy efficiency, wherein the rectifier of the present invention includes two PMOS transistors MP1 and MP2, two NMOS transistors MN1 and MN2, and two high-level comparators COMH1, COMH2) and two low-level comparators (COML1, COML2), and when an AC input below the GND level is applied to the rectifier's input terminal A, the NMOS transistor MN1 is 'turned on' so that the input terminal A goes to the GND level. When the AC input of Vdd level or higher is applied to the input terminal B, the PMOS transistor PN2 is 'turned on' so that the input terminal B becomes the Vdd level, thereby preventing latch-up, and further, according to the present invention. There is no need to consider in particular the breakdown voltage of the device, and it can be manufactured by a device manufacturing process suitable for manufacturing a device having a breakdown voltage of about 10V.

Description

전파 브리지 정류회로(a full-wave bridge rectifier circuit)A full-wave bridge rectifier circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제4도는 본 발명에 따른 정류기의 회로도,4 is a circuit diagram of a rectifier according to the present invention,

제5도는 제4도에서의 하이레벨 비교기의 회로도,5 is a circuit diagram of a high level comparator in FIG.

제6도는 제4도에서의 로우레벨 비교기의 회로도.6 is a circuit diagram of a low level comparator in FIG.

Claims (3)

AC 전압이 입력되는 두 개의 입력단자들의 제1 입력단자로 제공되는 제1 입력전압을 출력단자의 출력전압과 비교하는 제1 비교수단과, 상기 출력단자와 상기 제1 입력단자 사이에 연결되고 상기 제1 비교수단에 의해 ‘온/오프’되는 제1 스위칭 수단과, 상기 두 개의 입력단자들의 제2 입력단자로 제공되는 제2 입력전압을 상기 출력전압과 비교하는 제02 비교수단과, 상기 출력단자와 상기 제2 입력단자 사이에 연결되고 상기 제2 비교수단에 의해 ‘온/오프’되는 제2 스위칭 수단과, 상기 제1 입력단자로 제공되는 상기 제1 입력전압을 그라운드 전압과 비교하는 제3 비교수단과, 상기 출력단자와 상기 제1 입력단자 사이에 연결되고 상기 제1 비교수단에 의해 ‘온/오프’되는 제3 스위칭 수단과, 상기 제2 입력단자로 제공되는 제2 입력전압을 상기 스라운드 전압과 비교하는 제4 비교수단과, 상기 출력단자와 상기 제2 입력단자 사이에 연결되고 상기 제4 비교수단에 의해 ‘온/오프’되는 제4 스위칭 수단을 포함하는 전파 브리지 정류회로.First comparing means for comparing a first input voltage provided as a first input terminal of two input terminals to which an AC voltage is input, with an output voltage of an output terminal, connected between the output terminal and the first input terminal and First switching means 'on / off' by a first comparing means, second comparing means for comparing a second input voltage provided to a second input terminal of the two input terminals with the output voltage, and the output Second switching means connected between a terminal and the second input terminal and 'on / off' by the second comparing means, and a first voltage comparing the first input voltage provided to the first input terminal with a ground voltage. 3 comparing means, a third switching means connected between the output terminal and the first input terminal and 'on / off' by the first comparing means, and a second input voltage provided to the second input terminal. The crown Fourth comparing means for comparing a voltage and the output terminal and the second input is connected between the terminal-wave bridge rectifier circuit comprising a fourth switching means which is 'on / off' by the said fourth comparison means. 제1항에 있어서, 상기 제1 및 제2 비교수단은 상기 제1 및 제2 입력전압이 상기 출력전압 보다 높을 때 상기 제1 및 제2 스위치 수단을 각각 ‘온’시키고, 상기 제3 및 제4 비교수단은 상기 제1 및 제2 입력전압이 상기 그라운드 전압보다 낮을 때 상기 제3 및 제4 스위치 수단을 각각 ‘온’시키는 전파브리지 정류회로.The method of claim 1, wherein the first and second comparison means 'turn on' the first and second switch means when the first and second input voltages are higher than the output voltage, respectively, And the comparison means 'turns on' the third and fourth switch means, respectively, when the first and second input voltages are lower than the ground voltage. 제2항에 있어서, 상기 제1 및 제2 비교수단은 상기 제1 및 제2 입력전압이 상기 출력전압 보다 높을 때 로우레벨의 신호를 출력하고, 상기 제3 및 제4 비교수단은 상기 제1 및 제2 입력전압이 상기 그라운드 전압 보다 낮을 때 하이레벨의 신호를 출력하며, 상기 제1 스위치 수단은 상기 제1 비교수단의 출력단에 게이트 단자가 접속되고 소오스 단자가 상기 출력단자에 접속되며 드레인 단자가 상기 제1 입력단자에 접속되는 제1 PMOS 트랜지스터를 포함하고, 상기 제2 스위치 수단은 상기 제2 비교수단의 출력단에 게이트 단자가 접속되고, 소오스 단자가 상기 출력단자에 접속되며 드레인 단자가 상기 제2 입력단자에 접속되는 제2 PMOS 트랜지스터를 포함하고, 상기 제3 스위치 수단은 상기 제3 비교수단의 출력단에 게이트 단자가 접속되고 소오스 단자가 상기 그라운드 단자에 접속되며 드레인 단자가 상기 제1 입력단자에 접속되는 제1 NMOS 트랜지스터를 포함하며, 상기 제4 스위치 수단은 상기 제4 비교수단의 출력단에 게이트 단자가 접속되고 소오스 단자가 상기 그라운드 단자에 접속되며 드레인 단자가 상기 제2 입력단자에 접속되는 제2 NMOS 트랜지스터를 포함하는 전파브리지 정류회로.3. The apparatus of claim 2, wherein the first and second comparison means output a low level signal when the first and second input voltages are higher than the output voltage, and the third and fourth comparison means are arranged in the first and second comparison means. And outputs a high level signal when a second input voltage is lower than the ground voltage, wherein the first switch means has a gate terminal connected to an output terminal of the first comparing means, a source terminal connected to the output terminal, and a drain terminal. Includes a first PMOS transistor connected to the first input terminal, the second switch means includes a gate terminal connected to an output terminal of the second comparing means, a source terminal connected to the output terminal, and a drain terminal connected to the output terminal. A second PMOS transistor connected to a second input terminal, wherein the third switch means has a gate terminal connected to an output terminal of the third comparing means, A first NMOS transistor connected to a round terminal and having a drain terminal connected to the first input terminal, wherein the fourth switch means has a gate terminal connected to an output terminal of the fourth comparing means, and a source terminal connected to the ground terminal. A full-wave bridge rectifier circuit comprising a second NMOS transistor connected to the drain terminal and connected to the second input terminal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950035597A 1995-10-16 1995-10-16 A full-wave bridge rectifier circuit KR0173949B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950035597A KR0173949B1 (en) 1995-10-16 1995-10-16 A full-wave bridge rectifier circuit
JP8010454A JPH09131064A (en) 1995-10-16 1996-01-24 Full-wave bridge rectification circuit
CN96107652A CN1148288A (en) 1995-10-16 1996-05-27 Full-wave bridge rectifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950035597A KR0173949B1 (en) 1995-10-16 1995-10-16 A full-wave bridge rectifier circuit

Publications (2)

Publication Number Publication Date
KR970024483A true KR970024483A (en) 1997-05-30
KR0173949B1 KR0173949B1 (en) 1999-05-01

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Application Number Title Priority Date Filing Date
KR1019950035597A KR0173949B1 (en) 1995-10-16 1995-10-16 A full-wave bridge rectifier circuit

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JP (1) JPH09131064A (en)
KR (1) KR0173949B1 (en)
CN (1) CN1148288A (en)

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WO1999060684A1 (en) * 1998-05-18 1999-11-25 Seiko Epson Corporation Overcharge protection, charger, electronic device and timepiece
US6366485B1 (en) * 1998-09-17 2002-04-02 Seiko Epson Corporation Power source device, power supplying method, portable electronic equipment, and electronic timepiece
JP2001186771A (en) 1999-10-15 2001-07-06 Seiko Epson Corp Chopper circuit, controlling method of chopper circuit, chopper-type charge circuit, electronic equipment, and clocking device
EP1096640A3 (en) 1999-10-25 2002-11-27 Seiko Epson Corporation AC voltage detection circuit and method, charging circuit and method, chopper circuit and chopping method, chopper charging circuit and method, electronic apparatus, and timepiece
AU2000264741A1 (en) * 2000-08-10 2002-02-25 Yamatake Corporation Power supply unit
JP4546184B2 (en) * 2004-08-04 2010-09-15 株式会社ニデック Rectification circuit and visual reproduction assisting device having the same
CN100464486C (en) * 2006-04-30 2009-02-25 武汉万鹏科技有限公司 Novel power supply rectification circuit
CN100593910C (en) * 2008-01-11 2010-03-10 清华大学 A low power consumption comparator with mistuning calibration function
JP5176810B2 (en) * 2008-09-18 2013-04-03 セイコーエプソン株式会社 Rectification control device, full-wave rectification circuit, power receiving device, non-contact power transmission system, and electronic device
JP5298892B2 (en) * 2009-01-30 2013-09-25 オムロン株式会社 Full-wave rectifier circuit
JP5783843B2 (en) 2010-11-19 2015-09-24 ローム株式会社 Switching rectifier circuit and battery charger using the same
KR20120130970A (en) * 2011-05-24 2012-12-04 삼성전기주식회사 LED circuit
US8804389B2 (en) * 2012-02-16 2014-08-12 Linear Technology Corporation Active bridge rectification
CN102790543B (en) * 2012-08-07 2015-10-14 浙江宇视科技有限公司 A kind of synchronous rectificating device
CN103904921B (en) 2014-03-04 2017-02-08 华为技术有限公司 Device controlling conversion of alternating current and direct current
CN104638954B (en) * 2015-03-16 2018-05-25 博为科技有限公司 A kind of MOSFET bridge circuits
CN110995031A (en) * 2019-12-20 2020-04-10 棱晶半导体(南京)有限公司 Integrated full-bridge rectifier circuit with anti-impact current
CN115208211B (en) * 2022-06-29 2024-04-16 西安电子科技大学 Forward self-biased full-wave rectifying circuit

Also Published As

Publication number Publication date
KR0173949B1 (en) 1999-05-01
CN1148288A (en) 1997-04-23
JPH09131064A (en) 1997-05-16

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