JP5176810B2 - Rectification control device, full-wave rectification circuit, power receiving device, non-contact power transmission system, and electronic device - Google Patents

Description

  The present invention relates to a rectification control device, a full-wave rectification circuit, a power receiving device, a contactless power transmission system, an electronic device, and the like.

  A full-wave rectifier circuit is generally composed of a rectifier bridge and a smoothing capacitor. As the rectification method, there are a diode rectification method and a synchronous rectification method.

  The diode rectification method is a method of converting an AC voltage into a rectified voltage (DC voltage) by a rectification bridge configured using a plurality of diodes (for example, PN junction diodes). However, in the diode rectification method, a forward voltage is generated in the diode, resulting in diode loss.

  The synchronous rectification method uses a low-loss active element (for example, a power MOSFET) instead of a diode, and for example, a timing control circuit (control IC or the like) switches on / off of the active element at an appropriate timing. . In the synchronous rectification method, for example, a power bipolar transistor may be used in addition to the power MOSFET.

  In this specification, an active element used for realizing the synchronous rectification method is referred to as a “synchronous rectification element”. Any active element can be used as long as it is low loss and can be turned on / off by inputting a control signal to the control node. In the case of MOSFET, the gate is the control node, and in the case of bipolar transistor, the base is the control node. However, MOSFET (power MOSFET) is suitable as a synchronous rectifier because it has excellent power saving and high withstand voltage.

  Synchronous rectification rectifier circuits using power MOSFETs are described in, for example, Patent Document 1 and Patent Document 2.

  The rectifier circuit described in Patent Document 1 measures the potential difference between the input terminal and the output terminal of the rectifier circuit by a comparator, and is connected between the input terminal and the output terminal by the output signal of the comparator. ON / OFF of the power MOSFET is controlled.

The rectifier circuit (full-wave bridge rectifier circuit) described in Patent Document 2 includes four power MOSFETs and four comparators for controlling on / off of each power MOSFET. The comparator compares the voltage at the input terminal with the DC output voltage VDD or the ground potential GND, and controls on / off of each power MOSFET according to the output signal of each comparator.
JP-T 60-502135 Japanese Patent Application Laid-Open No. 9-131064

  In the synchronous rectification type rectifier circuit described in Patent Document 1 and Patent Document 2, the voltage of the input terminal of the rectifier circuit (that is, the voltage of the AC signal) and the voltage of the output terminal of the rectifier circuit (that is, the rectified voltage) are compared. To control on / off of a MOSFET (synchronous rectifier) connected between the input terminal and the output terminal.

  Each of the two signals (that is, the AC signal and the rectified voltage) input to the comparator is an analog signal continuous on the time axis, and when viewed microscopically, the voltage level constantly fluctuates. For example, an AC signal input to the rectifier circuit tends to oscillate under the influence of the inductance of the secondary coil, the parasitic capacitance of the MOSFET, etc., and does not become an accurate sine wave (or cosine wave). Further, the voltage level of the rectified voltage obtained from the rectifier circuit also fluctuates due to the influence of noise, for example. Therefore, there is a limit to improving the accuracy of voltage comparison by the comparator.

  Further, when the synchronous rectifier element is turned on, the on-resistance of the synchronous rectifier element is low, so that the potential difference between the input terminal and the output terminal of the rectifier circuit is very small (for example, about several mV). In other words, since the potential difference between the two voltages input to the comparator is almost eliminated, accurate voltage comparison becomes difficult, and a considerable delay occurs in the timing at which the synchronous rectifying element in the on state is shifted to the off state. When the turn-off timing of the synchronous rectifier element is delayed, for example, a reverse flow of the charge accumulated in the rectifier capacitor occurs during the delay period, and the energy efficiency of the rectifier circuit decreases. Therefore, it is desirable to control the turn-off timing of the synchronous rectifying element as accurately as possible.

  In addition, since an actual comparator cannot perform voltage comparison unless the voltage difference between the voltages to be compared is large to some extent, it is inevitable that a slight detection delay occurs. However, the actual detection delay varies. Therefore, in order to control on / off of the synchronous rectifying element with higher accuracy, it is desirable to reduce variations in detection delay.

  In addition, for example, when a rectifier circuit is provided in a power receiving device of a non-contact power transmission system, high power transmission efficiency is required in the non-contact power transmission system. Therefore, it is extremely important to reduce loss of the rectifier circuit and improve energy efficiency. It becomes a problem. Therefore, it is important to realize a timing control of the synchronous rectifying element with higher accuracy than ever before.

  According to some aspects of the present invention, it is possible to control the on / off timing of a highly accurate synchronous rectification element, which has not been possible in the past, and to reduce loss and heat generation of the rectifier circuit and improve energy efficiency. it can.

  (1) According to one aspect of the rectification control device of the present invention, the plurality of synchronous rectification elements in a full-wave rectification circuit including a rectification bridge including a plurality of synchronous rectification elements and a smoothing capacitor connected to the rectification bridge. And a timing control circuit for controlling on / off of at least one of the plurality of synchronous rectifier elements by at least one on / off control signal. The timing control circuit includes an on / off control signal generation circuit that generates a first on / off control signal that is one of the at least one on / off control signal, and the on / off control signal generation circuit. Is one of an AC voltage input to the rectifier bridge, a rectified voltage output from the rectifier bridge, and a reference voltage of the rectifier bridge A sampling circuit for sampling, a sampling voltage sampled by the sampling circuit, and a first comparator for comparing the AC voltage, and based on an output signal of the first comparator, An on / off control signal is generated.

  In this aspect, one of the two voltage signals input to the first comparator (voltage comparison circuit) is a voltage (discrete value voltage) sampled by the sampling circuit.

  That is, in this aspect, the sampling voltage is compared with the AC voltage input to the rectifier circuit. The sampling voltage (discrete value voltage) sampled by the sampling circuit is a voltage on which noise is not superimposed. Therefore, the comparison accuracy is improved as compared with the case of comparing two analog voltages that are continuous on the time axis (both of these voltages constantly fluctuate due to the influence of noise or the like). Therefore, more accurate on / off control of the synchronous rectifying element constituting the rectifying element is possible.

  The output signal of the first comparator is used to generate an on / off control signal (first on / off control signal) of at least one of the plurality of synchronous rectifying elements. For example, at least one of the rising timing and the falling timing of the on / off control signal of the synchronous rectifying element can be determined based on the output signal of the comparator.

  (2) In another aspect of the rectification control device of the present invention, the first comparator is constituted by a first hysteresis comparator, and the threshold voltage of the first hysteresis comparator is an output signal of the first hysteresis comparator. When the voltage level of the first hysteresis comparator is L level, the first threshold voltage is used. When the voltage level of the output signal of the first hysteresis comparator is H level, the second threshold voltage is used. The hysteresis width determined as the voltage difference from the second threshold voltage is set to a voltage at which the first hysteresis comparator is insensitive to noise superimposed on the AC voltage.

  In this aspect, the first hysteresis comparator is used as the first comparator. The hysteresis comparator is a comparator whose threshold voltage is switched according to the voltage level of the output signal. The threshold voltage of the hysteresis comparator is switched corresponding to the voltage level of the output signal. The difference voltage between the first threshold voltage and the second threshold voltage is a hysteresis width, and the hysteresis width is a voltage at which the first hysteresis comparator is insensitive to noise superimposed on the AC voltage (for example, 25 mV). Set to As a result, the voltage level of the output signal of the comparator does not fluctuate following the noise. As described above, the on / off control accuracy of the synchronous rectifying element is improved compared to the conventional one by the synergistic effect of the comparison accuracy improvement effect by adopting the sampling circuit and the noise countermeasure effect by adopting the hysteresis comparator. Greatly improved.

  Further, the on-time of the synchronous rectifier can be finely adjusted by positively using the hysteresis width of the hysteresis comparator. For example, the sampling voltage is Samp (VA), and the hysteresis width (hysteresis voltage) is Vhs. The voltage level of the output signal of the hysteresis comparator is changed from the inactive level (for example, L) to the active level at the time when the voltage of the AC signal crosses Samp (VA) (in reality, it can also be the time when it exceeds or falls below). (For example, H), and when the AC voltage crosses (Samp (VA) -Vhs), for example (in reality, it can be said to be a time point that exceeds or falls below) from an active level (for example, H). It changes to an inactive level (for example, L).

  If the hysteresis width Vhs is set to, for example, about 25 mV, the potential difference can be reliably detected by the comparator. Therefore, the timing at which the output of the comparator changes from the active level (H) to the inactive level (L) , (Samp (VA) −Vhs), and the timing is accurately determined. In addition, the waveform of the AC voltage can be predicted at the time of design, and the hysteresis width Vhs is known. Therefore, the delay amount of the level inversion timing of the output signal of the hysteresis comparator due to the hysteresis width Vhs can be predicted at the time of design. Therefore, if the circuit design is optimized, the on-time of the synchronous rectifying element can be finely adjusted. For example, the loss due to the turn-on delay of the synchronous rectifier element can be suppressed within a predetermined range, or the backflow of charge due to the turn-off delay can be minimized. In other words, by actively utilizing the hysteresis width Vhs, the on-time of the synchronous rectifying element can be finely adjusted to facilitate the design.

  As described above, according to this aspect, by adopting the voltage sampling method and the hysteresis comparator, sufficient noise countermeasures can be realized, and timing control using the hysteresis width can be performed actively. Circuit loss and heat generation can be reduced, and energy efficiency can be improved. The hysteresis width is an appropriate voltage as a noise countermeasure, and is desirably set to a voltage at which the hysteresis comparator can reliably detect the voltage difference between the input signals. For example, the hysteresis width can be set to about 25 mV.

  (3) In another aspect of the rectification control device of the present invention, the on / off control signal generation circuit further includes a sampling signal generation circuit that generates a sampling signal for determining a sampling timing of the sampling circuit, The sampling signal generation circuit compares the AC voltage with the rectified voltage or a reference voltage of the rectification bridge, and outputs a timing signal for generating the sampling signal, and the timing signal And a logic circuit for generating the sampling signal.

  A sampling signal for determining the sampling timing of the sampling circuit is generated by the sampling signal generation circuit. The sampling signal generation circuit includes a second hysteresis comparator and a logic circuit.

  The reason for using the second hysteresis comparator for generating the sampling signal is to generate an accurate timing signal without being affected by noise.

  The logic circuit generates a sampling signal based on the timing signal generated by the second hysteresis comparator. In addition, the logic circuit can include, for example, a delay circuit that delays the timing signal by a given time, a delayed timing signal, and an AND gate that receives the timing signal without delay as an input signal (this circuit). The configuration is an example and is not limited to this configuration). As a result, the sampling signal can be generated and output at an appropriate timing.

  (4) In another aspect of the rectification control device of the present invention, the sampling circuit includes: a sampling switch whose on / off is controlled by the sampling signal output from the sampling signal generation circuit; and the sampling switch And a sampling capacitor connected between the first and second potentials.

  The sampling circuit can be constituted by a sample and hold circuit having a sampling switch and a sampling capacitor. During a period in which the sampling signal is at an active level, the sampling switch is turned on to sample either an AC voltage, a rectified voltage, or a reference voltage (for example, GND) of the rectified bridge. Since the circuit configuration is simple, the area occupied by the circuit can be reduced.

  (5) In another aspect of the rectification control device of the present invention, the rectification control device further includes an output circuit that generates and outputs an on / off control signal for the synchronous rectification element based on the output signal of the first comparator. The output circuit maintains the on / off control signal of the synchronous rectifying element at an inactive level during a sampling period in which the sampling is performed by the sampling circuit.

  During the period in which the sampling circuit is performing sampling, an accurate sampling voltage is not output, and a highly accurate on / off control signal for the synchronous rectifier cannot be created. Therefore, an output circuit is provided to maintain the on / off control signal of the synchronous rectifier at an inactive level during the sampling period. As a result, a situation in which the on / off control signal of the synchronous rectifying element is generated and output at an undesired timing does not occur.

  (6) In another aspect of the rectification control device of the present invention, the rectification control device further includes an output circuit that generates an on / off control signal of the synchronous rectification element based on an output signal of the first comparator, and the output The circuit sets the on / off control signal of the synchronous rectifying element to the active level during a period in which the output signal of the second hysteresis comparator is at the active level and the output signal of the first comparator is at the active level. To do.

  In this aspect, an output circuit is provided, and the ON / OFF of the synchronous rectifier element is performed in a period in which both the output signal of the second hysteresis comparator and the output signal of the first comparator (including the first hysteresis comparator) are at the active level. An off control signal is generated. With this configuration, for example, even when the synchronous rectifier continues to be turned on until the polarity of the AC voltage input to the rectifier bridge is reversed, the on / off control is reliably turned off by the output signal of the second hysteresis comparator. Can be made. Therefore, safety is improved.

(7) In another aspect of the rectification control device of the present invention, the AC voltage is input to the first node and the second node of the rectification bridge, the rectification voltage is output from the third node, and the reference is output to the fourth node. A voltage is supplied, and the smoothing capacitor is connected to the third node;
The first on / off control signal generated by the on / off control signal generation circuit is generated between the m-th node (m is 1 or 2) and the n-th node (n is 3 or 4) of the rectifier bridge. The sampling circuit used for on / off control of a synchronous rectifier element connected between them and included in the on / off control signal generation circuit has a voltage of the m-th node crossing a voltage of the n-th node. In this case, the voltage at the m-th node or the voltage at the n-th node is sampled, and the first comparator compares the sampling voltage with the voltage at the m-th node.

  In this aspect, a full-bridge circuit having first to fourth nodes is used as the rectifier bridge. For example, AC voltages having opposite phases are input to the first node and the second node, for example, a rectified voltage is output from the third node, and a reference voltage node (for example, a GND node) is connected to the fourth node.

  (8) In another aspect of the rectification control device of the present invention, the timing control circuit operates using the rectified voltage output from the rectification bridge as a power supply voltage, and the on / off control signal generation circuit includes the rectification It further includes an output assurance circuit that maintains the first on / off control signal at an inactive level until the voltage exceeds a given voltage level.

  A timing control circuit included in the rectification control device may operate using a rectified voltage obtained from the full-wave rectifier circuit as a power supply voltage. For example, when the full-wave rectification circuit and the rectification control device are provided in the power receiving device of the contactless power transmission system, the rectification control device operates using the rectified voltage of the full-wave rectification circuit as a power supply voltage.

  In this case, if the timing control circuit is operated in a period in which the voltage level of the rectified voltage as the power supply voltage does not reach a given voltage level, the circuit operation becomes unstable due to insufficient power supply voltage, There may be a case where the on / off control of the synchronous rectifying element cannot be performed. For example, a situation may occur in which the first and second rectifying elements are simultaneously turned on and a large through current flows to reduce the energy efficiency of the rectifier circuit.

  Therefore, in this aspect, an output guarantee circuit is provided in the timing control circuit. The output assurance circuit maintains the first on / off control signal at an inactive level until the rectified voltage is equal to or higher than a given voltage level. By adopting this circuit configuration, each of the plurality of synchronous rectifying elements constituting the rectifying bridge is turned off until the rectified voltage as the power supply voltage rises to a given level. The rectification operation is performed by the body diodes (parasitic diodes) connected in parallel. Therefore, for example, a situation in which the first and second synchronous rectifying elements are simultaneously turned on and a large through current flows does not occur.

  The output guarantee circuit ensures that the on / off control signal of the synchronous rectifier element output from the timing control circuit is a normal control voltage. Therefore, the reliability of control of the synchronous rectifying element by the rectification control device is improved.

  (9) In another aspect of the rectification control device of the present invention, the on / off control signal generation circuit includes a first synchronous rectification connected between the first node and the third node of the rectification bridge. ON / OFF of the first synchronous rectification element connected between the second node and the third node of the rectification bridge and the first ON / OFF control signal for controlling ON / OFF of the element A second on / off control signal for controlling off, and the sampling circuit included in the on / off control signal generation circuit includes the first on / off control signal and the second on / off control signal. Commonly used for generation of both control signals.

  In this aspect, the sampling circuit used for generating the first on / off control signal (for example, TG1) for the first synchronous rectification element (for example, M1) is used as the second synchronous rectification element. It is also used to generate a second on / off control signal (eg, TG2) for (eg, M2). By sharing the sampling circuit, the circuit configuration can be simplified, the area occupied by the circuit can be reduced, and the power consumption can be reduced.

  For example, when the AC voltage (VC1) input to the first node of the rectification bridge exceeds the rectification voltage (Vout), the rectification voltage (Vout) is sampled, and the AC voltage input to the second node of the rectification bridge When (VC2) exceeds the rectified voltage (Vout), it is assumed that the rectified voltage (Vout) is sampled. In this case, the sampling target is only the rectified voltage (Vout). Further, the generation of the first on / off control signal and the generation of the second on / off control signal are not performed simultaneously.

  Therefore, it is possible to use one sampling circuit (as well as a part of the sampling signal generation circuit) in a time division manner. Therefore, sharing of the sampling circuit is realized.

  (10) In another aspect of the rectification control device of the present invention, the on / off control signal generation circuit is configured to turn on / off a first synchronous rectification element connected between the first node and the third node. The first on / off control signal for controlling off and the second on / off for controlling on / off of the second synchronous rectifier connected between the second node and the third node Each of the first comparator and the sampling circuit included in the on / off control signal generation circuit includes the first on / off control signal and the second on / off control signal. Commonly used to generate both off control signals, the output signal of the first comparator is output as the first on / off control signal or the second on / off control signal To switch It has a distribution circuit for switching on the basis of the control signal, by comparing the voltage to the voltage of the second node of the first node, and a comparison circuit for generating the switching control signal.

  In this aspect, the sampling circuit and the first comparator (including the first hysteresis comparator) are commonly used for generating the first and second on / off control signals. By sharing each circuit, it is possible to further simplify the circuit configuration, further reduce the area occupied by the circuit, and further reduce power consumption.

  For example, assume that the rectified voltage is sampled. The generation of the first on / off control signal and the generation of the second on / off control signal are not performed simultaneously. Therefore, by using each circuit in a time division manner, the first comparator and the sampling circuit can be shared.

  Further, the signal output from the first comparator is output as the first on / off control signal (TG1) for the first synchronous rectifying element, or the second on / off for the second synchronous rectifying element. Whether to output as an off control signal (TG2) is controlled by a distribution circuit. The operation of the distribution circuit is controlled by a switching control signal.

  (11) In another aspect of the rectification control device of the present invention, the rectification control device includes a sampling signal generation circuit that generates a sampling signal for determining a sampling timing of the sampling circuit, and the sampling signal generation circuit includes the AC voltage, A second comparator that compares the rectified voltage or a reference voltage of the rectifier bridge and outputs a timing signal for generating the sampling signal; and the second comparator includes the first and second comparators. Which is commonly used to generate both on / off control signals and whether the second comparator is supplied with the first node AC voltage or the second node AC voltage. A changeover switch that is switched by the changeover control signal;

  In this aspect, the second hysteresis comparator included in the sampling circuit is also commonly used to generate both the first and second on / off control signals. Whether to supply the alternating voltage at the first node or the alternating voltage at the second node is switched by a changeover switch. The operation of the changeover switch is controlled by a changeover control signal output from the comparison circuit. As described above, this switching control signal also functions as a control signal for the distribution circuit.

  (12) In another aspect of the rectification control device of the present invention, the rectification control device includes the rectification bridge.

  In this aspect, the rectification control device incorporates not only a timing control circuit but also a rectification bridge. For example, when the rectifier bridge can be configured with a transistor having a relatively low breakdown voltage, the rectifier bridge can be incorporated in a rectification control device (for example, an IC), thereby receiving power of the contactless power transmission system. The number of parts in the apparatus can be reduced.

  (13) One aspect of the full-wave rectifier circuit of the present invention is a rectifier bridge including a plurality of synchronous rectifier elements, a smoothing capacitor connected to the rectifier bridge, and at least one on / off of the plurality of synchronous rectifier elements. Is controlled by at least one on / off control signal.

  The full-wave rectification circuit of this aspect includes a synchronous rectification type rectification bridge, a smoothing capacitor, and the rectification control device described above. According to this aspect, on / off of the synchronous rectifying element can be controlled at an appropriate timing, and for example, loss due to the body diode can be reduced. In addition, the backflow of charges accumulated in the smoothing capacitor can be effectively prevented. Therefore, a synchronous rectification type full-wave rectification circuit with low loss and high energy efficiency can be realized.

  (14) One aspect of the power receiving device of the present invention is the power receiving device in the non-contact power transmission system in which the primary coil and the secondary coil are electromagnetically coupled to transmit power from the power transmitting device to the power receiving device. A full-wave rectification circuit including a rectification bridge including a plurality of synchronous rectification elements and a smoothing capacitor, and the rectification control device according to any one of the above.

The power receiving device of this aspect includes a synchronous rectification type full-wave rectification circuit and any one of the rectification control devices described above. Note that the power receiving apparatus can further include, for example, a power supply control unit that supplies a power supply voltage based on the rectified voltage output from the full-wave rectifier circuit to the load to be supplied.
For example, the power receiving device operates by the rectified voltage output from the full-wave rectifier circuit, and power is supplied to a load (for example, a secondary battery) to be fed. According to this aspect, since the loss in the full-wave rectifier circuit is small, heat generation is reduced, and high energy efficiency is realized, the transmission efficiency of the non-contact power transmission system is remarkably improved.

  (15) In one aspect of the contactless power transmission system of the present invention, the primary coil and the secondary coil are electromagnetically coupled to transmit power from the power transmission device to the power reception device.

  According to the contactless power transmission system of this aspect, the loss in the full-wave rectifier circuit provided in the power receiving device is small, heat generation is reduced, and high energy efficiency is realized. Is significantly improved.

  (16) One aspect of the electronic device of the present invention includes any one of the rectification control devices described above.

  According to this aspect, loss in the power supply system of the electronic device can be reduced.

  (17) Another aspect of the electronic device of the present invention includes the full-wave rectifier circuit described above.

  According to this aspect, loss in the power supply system of the electronic device can be reduced.

  As described above, according to some aspects of the present invention, it is possible to control the on / off timing of a highly accurate synchronous rectification element, which has not been possible in the past, to reduce loss and heat generation of the rectifier circuit, and to improve energy efficiency. Can be achieved.

  Hereinafter, preferred embodiments of the present invention will be described in detail. The present embodiment described below does not unduly limit the contents of the present invention described in the claims, and all the configurations described in the present embodiment are indispensable as means for solving the present invention. Not always.

(First embodiment)
First, an example of the circuit configuration of the full-wave rectifier circuit will be described.

(Configuration example of full-wave rectifier circuit)
FIG. 1A to FIG. 1C are diagrams for describing an example of a configuration of a synchronous rectification type full-wave rectification circuit and a rectification control device.

  In FIG. 1A, the primary coil L1 and the secondary coil L2 constitute a transformer. The full-wave rectification circuit 150 is a synchronous rectification type full-wave rectification circuit, and includes a rectification bridge 100 including at least one synchronous rectification element, and a smoothing capacitor C1. The full-wave rectifier circuit 150 rectifies the AC voltage input to the coil ends (node NX and node NY) of the secondary coil L2 and converts it to a rectified voltage (DC voltage) Vout. The rectified voltage Vout is supplied to the load LQ.

  Further, the rectification control device (rectification control IC) 250 controls the on / off timing of at least one synchronous rectification element constituting the rectification bridge 100. The rectification control device 250 has at least a timing control circuit 200.

  The timing control circuit 200 receives an AC voltage VC1 input to the coil end (node NX), an AC voltage VC2 input to the coil end (node NY), and a rectified voltage Vout. Further, the timing control circuit 200 generates an on / off control signal (timing control signal) TGn (n is any one of 1 to 4) of the synchronous rectifying element. The on / off timing of the synchronous rectifier included in the rectifier bridge 100 is controlled by the on / off control signal TGn.

  The timing control circuit 200 compares the AC voltage VC1 or VC2 with the rectified voltage Vout or the reference potential VSS and outputs a signal indicating a comparison result in order to generate the above-described on / off control signal TGn. A control signal generation circuit (not shown in FIG. 1) is included. This on / off control signal generation circuit has a unique circuit configuration for comparing the AC voltage (VC1, VC2) and the rectified voltage (Vout) or the reference potential (VSS) with high accuracy (that is, a sampling circuit). If this on / off control signal generation circuit is used, high-accuracy voltage comparison is possible without being affected by noise. This point will be described later.

  FIG. 1B is a diagram illustrating an example of a circuit configuration of the rectifier bridge 100. The rectifier bridge 100 in FIG. 1B is configured by NMOS transistors (M1 to M4) as synchronous rectifier elements.

  The AC voltage VC1 is input to the first node N1 of the rectifier bridge 100, and the AC voltage VC2 is input to the second node N2. The voltage polarity of AC voltage VC1 (that is, whether it is positive or negative) is opposite to the voltage polarity of AC voltage VC2.

  A rectified voltage (DC voltage) Vout is obtained from the third node N3 of the rectifier bridge 100. The fourth node N4 is connected to a reference potential VSS (for example, GND).

  A first synchronous rectifier (NMOS transistor) M1 is connected between the first node N1 and the third node N3 of the rectifier bridge, and a second synchronous rectifier is connected between the second node N2 and the third node N3. A rectifying element (NMOS transistor) M2 is connected, a third synchronous rectifying element (NMOS transistor) M4 is connected between the first node N1 and the fourth node N4, and the second node N2 and the third node N3 are connected to each other. A fourth synchronous rectifying element (NMOS transistor) M4 is connected between them.

  A body diode (parasitic diode) DP1 having a forward direction from the first node N1 to the third node N3 is connected between the source and drain of the first synchronous rectifier element M1. Similarly, a body diode (parasitic diode) DP2 having a forward direction from the second node N2 to the third node N3 is connected between the source and the drain of the second synchronous rectifier M2. Similarly, a body diode (parasitic diode) DP3 having a forward direction from the fourth node N4 to the first node N1 is connected between the source and drain of the third synchronous rectifier element M3. Similarly, a body diode (parasitic diode) DP4 having a forward direction from the third node N3 to the second node N2 is connected between the source and the drain of the fourth synchronous rectifier element M4.

FIG. 1C is a cross-sectional view showing a device structure of an NMOS transistor as a synchronous rectifying element. The NMOS transistor is a vertical power transistor, and includes a drain electrode 1 (D), an N ⁺ layer 2 and an N ⁻ layer 3 constituting a drain, a P well 4, an N ⁺ layer 5 constituting a source, The gate insulating film 6, the polysilicon gate 7 (G), the protective film 8, and the source electrode 9 (S) are comprised.
The synchronous rectifier element is a low-loss switching element made of an active element. As described above, a MOSFET can be used as the synchronous rectifier element, but in some cases, a bipolar transistor or other active element is used. It is possible that In this specification, the term “synchronous” in the synchronous rectification method has no special meaning, and all the rectification methods for switching the AC voltage to the rectified voltage by switching the active element at an appropriate timing, It can be called a synchronous rectification method.

  As a configuration of the synchronous rectification rectifier bridge, for example, a configuration in which all of the first to fourth rectifier elements constituting the rectifier bridge are synchronous rectifier elements, and a part of the first to fourth rectifier elements. Only a synchronous rectifier element is used, and a diode (including a MOS diode and a PN junction diode) is used as the remaining rectifier element. In order to reduce the loss in the rectifier circuit, it is desirable that all of the first to fourth rectifier elements are synchronous rectifier elements.

  On the other hand, when a part of the first to fourth rectifying elements is dioded, on / off control is not required unlike the synchronous rectifying element, and the burden on the timing control circuit is reduced. Further, if the polarity of the AC voltage is reversed, there is an advantage that the diode is reverse-biased and the reverse flow of the charge accumulated in the smoothing capacitor is automatically prevented.

  In the rectifier bridge, it is desirable that at least the first and second rectifier elements (M1, M2) are constituted by synchronous rectifier elements. That is, from the viewpoint of improving the energy efficiency of the rectifier circuit, at least the first and second rectifier elements (M1, M2) connected to the smoothing capacitor C1 are configured by synchronous rectifier elements, and each synchronous rectifier element is It is desirable to appropriately control on / off of the.

(Example in which the on / off timing of each of the four synchronous rectifying elements constituting the rectifying bridge is controlled by four timing control circuits)
FIG. 2 is a diagram illustrating an example of an internal configuration of a timing control circuit included in the rectification control device and an example of a circuit operation. In FIG. 2, the timing control circuit 200 controls the on / off of each of the first to fourth synchronous rectifier elements (M1 to M4) to generate first to fourth on / off control signal generation circuits ( That is, it has a TG1 generation circuit 10a, a TG2 generation circuit 10b, a TG3 generation circuit 10c, and a TG4 generation circuit 10d).

  The first on / off control signal generation circuit (TG1 generation circuit) 10a compares the AC voltage VC1 input to the first node N1 of the rectification bridge 100 with the rectification voltage Vout obtained from the third node N3. Based on the comparison result, an on / off control signal TG1 for controlling on / off of the NMOS transistor M1 as the first synchronous rectifying element is generated. The on / off control signal TG1 drives the gate (control terminal) of the NMOS transistor M1 as the first synchronous rectifying element.

  That is, when the first on / off control signal generation circuit 10a detects that the AC voltage VC1 exceeds the rectified voltage Vout, the on / off control output from the first on / off control signal generation circuit 10a. The signal TG1 is inverted to the H level, and the NMOS transistor M1 as the first synchronous rectifying element is turned on. When the first on / off control signal generation circuit (TG1 generation circuit) 10a detects that the AC voltage VC1 has fallen below the rectified voltage Vout, the on / off control signal TG1 becomes L level, and the first The NMOS transistor M1 as the synchronous rectifier element is turned off.

  Similarly, the second on / off control signal generation circuit (TG2 generation circuit) 10b generates an AC voltage VC2 input to the second node N2 of the rectifier bridge 100 and a rectified voltage Vout obtained from the third node N3. Based on the comparison result, an on / off control signal TG2 for controlling on / off of the NMOS transistor M2 as the second synchronous rectifying element is generated. The on / off control signal TG2 drives the gate (control terminal) of the NMOS transistor M2 as the second synchronous rectifying element.

  That is, when the second on / off control signal generation circuit 10b detects that the AC voltage VC2 exceeds the rectified voltage Vout, the on / off control output from the second on / off control signal generation circuit 10b. The signal TG2 is inverted to the H level, and the NMOS transistor M2 as the second synchronous rectifier is turned on. When the second on / off control signal generation circuit (TG2 generation circuit) 10b detects that the AC voltage VC2 has fallen below the rectified voltage Vout, the on / off control signal TG2 becomes L level, The NMOS transistor M2 as the second synchronous rectifier element is turned off.

  Similarly, the third on / off control signal generation circuit (TG3 generation circuit) 10c includes an AC voltage VC1 input to the first node N1 of the rectification bridge 100 and a reference potential VSS (connected to the fourth node N4). GND) and an on / off control signal TG3 for controlling on / off of the NMOS transistor M3 as the third synchronous rectifying element is generated based on the comparison result. The on / off control signal TG3 drives the gate (control terminal) of the NMOS transistor M3 as the third synchronous rectifier.

  That is, when the third on / off control signal generation circuit (TG3 generation circuit) 10c detects that the AC voltage VC1 is lower than the reference potential VSS (GND), the third on / off control signal generation circuit. The on / off control signal TG3 output from 10c is inverted to the H level, and the NMOS transistor M3 as the third synchronous rectifying element is turned on. When the third on / off control signal generation circuit 10c detects that the AC voltage VC1 exceeds the reference potential VSS (GND), the on / off control signal TG3 becomes L level, and the third synchronization The NMOS transistor M3 as a rectifying element is turned off.

  Similarly, the fourth on / off control signal generation circuit (TG4 generation circuit) 10d includes an AC voltage VC2 input to the second node N2 of the rectifier bridge 100 and a reference potential VSS (connected to the fourth node N4). GND) and an on / off control signal TG4 for controlling on / off of the NMOS transistor M4 as the fourth synchronous rectifying element is generated based on the comparison result. The on / off control signal TG4 drives the gate (control terminal) of the NMOS transistor M4 as the fourth synchronous rectifying element.

  That is, when the fourth on / off control signal generation circuit (TG4 generation circuit) 10d detects that the AC voltage VC2 is lower than the reference potential VSS (GND), the fourth on / off control signal generation circuit. The on / off control signal TG4 output from 10d is inverted to the H level, and the NMOS transistor M4 as the fourth synchronous rectifying element is turned on. When the fourth on / off control signal generation circuit 10d detects that the AC voltage VC2 exceeds the reference potential VSS (GND), the on / off control signal TG4 becomes L level, and the fourth synchronization The NMOS transistor M4 as a rectifying element is turned off.

  Each of the on / off control signal generation circuits (TG1 generation circuit to TG4 generation circuit) 10a to 10d has a unique circuit configuration (sampling system circuit configuration) for comparing the voltages to be compared with high accuracy. When these on / off control signal generation circuits (TG1 generation circuit to TG4 generation circuit) are used, stable and highly accurate voltage comparison is possible without being affected by noise. Therefore, each synchronous rectifier element (M1 to M4) can be turned on / off at an appropriate timing, and therefore, for example, diode loss due to the forward voltage of the body diode can be suppressed, and a smoothing capacitor The backflow of the charge accumulated in C1 can be suppressed, and the optimum design of the full-wave rectifier circuit becomes possible.

(Example in which the timing control circuit controls on / off of only a part of the four synchronous rectifying elements constituting the rectifying bridge)
FIGS. 3A and 3B are diagrams for explaining the configuration and operation of an example in which the timing control circuit controls on / off of only a part of the four synchronous rectifying elements constituting the rectifying bridge. FIG.

  The timing control circuit 200 of FIG. 3A has only the first and second on / off control signal generation circuits 10a and 10b (that is, the TG1 generation circuit 10a and the TG2 generation circuit 10b). That is, the timing control circuit 200 outputs only the on / off control signals TG1 and TG2 for controlling on / off of each of the first synchronous rectifying element M1 and the second synchronous rectifying element M2.

  In the full-wave rectifier circuit of FIG. 3A, the NMOS transistor M3 as the third synchronous rectifier is driven by the on / off control signal TG2 of the second synchronous rectifier, and the fourth synchronous rectifier The NMOS transistor M4 is driven by an on / off control signal TG1 of the first synchronous rectifying element.

  In the full-wave rectifier circuit of FIG. 3B, the gate (control node) of the NMOS transistor M3 as the third synchronous rectifier is connected to the second node (N2), and is used as the fourth synchronous rectifier. The gate (control node) of the NMOS transistor M4 is connected to the first node N1.

  Note that the third synchronous rectifying element M3 and the fourth synchronous rectifying element M4 can be MOS diodes, or can be PN junction diodes.

  In the case of the circuit configuration of FIG. 3B, the third and fourth synchronous rectifier elements (M3, M4) are turned on / off by AC voltages (VC1, VC2) having different polarities input to the rectifier bridge 100. Automatically controlled by each.

  In the present embodiment shown in FIG. 3A and FIG. 3B, the timing control circuit 200 includes on / off control signals (TG1, TG2) related to the first and second synchronous rectifier elements (M1, M2). You just need to generate Therefore, the burden on the timing control circuit 200 is reduced, and the circuit configuration of the timing control circuit 200 can be simplified. Further, the area occupied by the timing control circuit 200 can be reduced.

(Outline of configuration of on / off control signal generation circuit)
FIGS. 4A and 4B are diagrams for explaining the outline of the configuration and operation of the on / off control signal generation circuit (here, the TG1 generation circuit).

  In the present invention, a sampling method is adopted as a method for on / off control of the synchronous rectifier element. That is, in the present invention, one of the two voltage signals input to the comparator (voltage comparison circuit) is a voltage (discrete value voltage) sampled by the sampling circuit. In addition, a hysteresis comparator (first hysteresis comparator) is used as the comparator. The hysteresis comparator is a comparator that switches the threshold voltage corresponding to the voltage level of the output signal.

  First, an outline of a circuit configuration of an on / off control signal generation circuit (here, TG1 generation circuit 10a) of an on-synchronous rectifying element will be described with reference to FIG. In FIG. 4A, the signal path when sampling AC signal VC1 is indicated by a solid arrow, and the signal path when sampling rectified voltage Vout is indicated by a dotted arrow. .

  The TG1 generation circuit 10a includes a sampling signal generation circuit 600 (including a second hysteresis comparator 602 and a logic circuit LGC (including a delay circuit 604 and a gate circuit 606)), a sampling circuit 608, and a first hysteresis. The comparator 610 and an output circuit 612 provided at the subsequent stage of the first hysteresis comparator 610 are included.

  The sampling signal generation circuit 600 generates a sampling signal CHG that determines the sampling timing of the sampling circuit 608. The sampling signal generation circuit 600 compares the AC voltage VC1 at the first node N1 of the rectifier bridge with the rectified voltage (Vout) at the third node N3, and outputs a timing signal (e1) for generating the sampling signal CHG. And at least one second hysteresis comparator 602 and a logic circuit LGC that generates the sampling signal CHG based on the timing signal (e1).

  The second hysteresis comparator 602 is used to generate the sampling signal CHG in order to generate an accurate timing signal (e1) without being affected by noise. The delay circuit 604 delays the timing signal (e1) generated by the second hysteresis comparator 602 by a given amount. The gate circuit 606 generates and outputs a sampling signal CHG by taking the logical product of, for example, a timing signal (e1) without delay and a delayed timing signal (e2 or e5) (however, this circuit configuration is an example) And is not limited to this configuration). With this configuration, the sampling signal CHG can be output at an appropriate timing.

  The sampling circuit 608 samples either the AC signal VC1 or the rectified voltage Vout and outputs the sampling voltage (e3 or e6 (= Samp (VA))) during the period in which the sampling signal CHG is at the active level (sampling period). Output.

  The first hysteresis comparator 610 compares the sampling voltage Samp (VA) with the real-time AC voltage VC1 and outputs a signal (e4 or e8) indicating the comparison result.

  The output circuit 612 can be configured by an AND gate, for example. The output circuit 612 (here, an AND gate) is output from the output signal (e4 or e8) of the first hysteresis comparator 610 and, for example, the output signal e2 of the delay circuit 604, or output from the second hysteresis comparator 602. And an on / off control signal TG1 for the first synchronous rectifying element M1 is generated and output.

  For example, during the period when the sampling circuit is performing sampling, an accurate sampling voltage is not output, and a high-accuracy synchronous rectifying element on / off control signal cannot be created. In the sampling period, the on / off control signal of the synchronous rectifying element is maintained at an inactive level. Further, for example, the on / off control signal of the synchronous rectifying element can be generated in a period in which both the output signal of the second hysteresis comparator and the output signal of the first comparator are at the active level. In this case, for example, even when the synchronous rectifier continues to be turned on until the polarity of the AC voltage input to the rectifier bridge is reversed, the on / off control is reliably turned off by the output signal of the second hysteresis comparator. be able to. Therefore, safety is improved.

  Next, an on / off control operation of the sampling type synchronous rectifier will be described with reference to FIG. Here, a case where the AC voltage VC1 input to the first node N1 of the rectifier bridge is compared with the rectified voltage Vout will be described as an example. Note that the rectified voltage Vout is a DC voltage, but when viewed microscopically, the voltage level may fluctuate slightly on the time axis due to the influence of noise or the like. Further, the AC voltage VC1 shows an oscillation tendency, and therefore a lot of noise is superimposed on the AC voltage VC1.

  As shown at the left end of FIG. 4B, the AC voltage VC1 at the first node N1 of the rectifying bridge intersects the rectified voltage Vout at time t1. That is, at time t1, the voltage level of AC voltage VC1 exceeds the voltage level of rectified voltage Vout. The potentials of the AC voltage VC1 and the rectified voltage Vout at time t1 are VA.

  When the voltage level of the AC voltage VC1 exceeds the voltage level of the rectified voltage Vout, the on / off control signal TG1 output from the TG1 generation circuit 10a changes to the active level, and thus the NMOS transistor M1 serving as the first synchronous rectifier element. Turns on.

  However, in actuality, the AC voltage VC1 tends to oscillate, and a lot of instantaneous noise is superimposed. Therefore, in order to accurately detect the timing when the voltage level of the AC voltage VC1 exceeds the voltage level of the rectified voltage Vout. With difficulty.

  Since the on-resistance of the NMOS transistor M1 is low, once the NMOS transistor M1 is turned on, the first node N1 and the third node N3 of the rectifier bridge are connected by a low resistance, and the first node N1 The voltage (that is, the alternating voltage VC1) is a potential very close to the rectified voltage Vout. At this time, the potential difference between the AC voltage VC1 and the rectified voltage Vout is, for example, about several mV. In a normal comparator, it is difficult to detect a potential difference of about several mV, and in the conventional technique, it is quite difficult to accurately detect the turn-off timing of the NMOS transistor M1 as the first synchronous rectifier.

  In the leftmost diagram of FIG. 4B, the transition of the voltage level of the AC voltage VC1 when the NMOS transistor M1 is not turned on is indicated by a dotted line for easy understanding.

  As shown in the center diagram of FIG. 4B, the sampling circuit 608 samples either the potential VA of the AC voltage VC1 or the potential VA of the rectified voltage Vout at the time t1 to obtain the sampling voltage Samp. (VA) is obtained.

  As shown at the right end of FIG. 4B, the sampling voltage Samp (VA) and the real-time AC voltage VC1 are compared by the first hysteresis comparator 610.

  In the rightmost diagram of FIG. 4B, the threshold voltage for H determination (first threshold voltage H (Vth)) of the first hysteresis comparator 610 is set, and the threshold voltage for L determination (second threshold value). Voltage L (Vth)). The threshold voltage of the first hysteresis comparator 610 is switched corresponding to the voltage level of the output signal. A difference voltage between the first threshold voltage (H (Vth)) and the second threshold voltage (L (Vth)) is a hysteresis width Vhs, and the hysteresis width Vhs corresponds to noise superimposed on the AC voltage VC1. Thus, the voltage at which the first hysteresis comparator 610 becomes insensitive is set.

  For example, the hysteresis width Vhs is an appropriate voltage as a noise countermeasure, and is desirably set to such a voltage that the hysteresis comparator 610 can reliably detect a voltage difference between two input signals, for example, set to about 25 mV. can do. As a result, the voltage level of the output signal of the hysteresis comparator does not fluctuate following the noise. Further, by actively using the hysteresis width Vhs, it is possible to determine (or adjust) at least one of the rising timing and the falling timing of the on / off control signal of the synchronous rectifier more accurately than in the past. be able to. Therefore, accurate timing control of the synchronous rectifier element is realized.

  In the rightmost diagram of FIG. 4B, the first threshold voltage H (Vth) is equal to the sampling voltage Samp (VA). Further, the second threshold voltage L (Vth) = Samp (VA) −Vhs is established.

  At time t1 when AC voltage VC1 intersects sampling voltage Samp (VA) (time t1 when AC voltage VC1 exceeds sampling voltage Samp (VA)), output signal e4 (e8) of first hysteresis comparator 610 is inactive level. It rises from (L) to the active level (H). The first hysteresis comparator 610 at time t2 when the AC voltage VC1 intersects the second threshold voltage L (Vth) (time t2 when the AC voltage VC1 falls below the second threshold voltage L (Vth)). Output signal e4 (e8) falls from the active level (H) to the active level (L).

  Note that the output signal e4 (e8) of the first hysteresis comparator 610 can also be used as the on / off control signal TG1 of the first synchronous rectifier element M1. Therefore, e4 (e8) (= TG1) is described in the rightmost diagram of FIG.

  As shown in the rightmost diagram of FIG. 4B, even if the voltage level of the AC voltage VC1 fluctuates due to noise, a hysteresis width hs is provided, so the voltage level of the on / off control signal TG1. Does not happen to fluctuate instantaneously.

  As described above, in this embodiment, the sampling voltage (discrete value voltage) Samp (VA) sampled by the sampling circuit 608 is compared with the real-time AC voltage VC1. The sampling voltage Samp (VA) is a voltage on which noise is not superimposed. Therefore, as compared with the conventional case where two analog voltages that are continuous on the time axis (both of these voltages constantly fluctuate due to the influence of noise or the like) are compared, the comparison accuracy is improved.

  Further, by using the first hysteresis comparator 610, it is possible to prevent the voltage level of the output signal of the comparator from instantaneously fluctuating due to the influence of noise superimposed on the AC voltage VC1 input to the rectifier bridge 100. . Since the output signal of the comparator is used for on / off control of the synchronous rectification element, for example, immediately after the output signal of the comparator changes from L to H, the output signal returns to L again due to the influence of noise. If an unforeseen situation occurs, the on / off of the synchronous rectifier cannot be controlled at an appropriate timing. By using the hysteresis comparator, the above-described disadvantage does not occur.

  As described above, the on / off control accuracy of the synchronous rectifying element is conventionally improved by the synergistic effect of the comparison accuracy improvement effect by adopting the sampling circuit 608 and the noise countermeasure effect by adopting the hysteresis comparator 610. Compared to a marked improvement.

  Further, the hysteresis width Vhs of the hysteresis comparator 610 can be freely set at the time of circuit design, and the on-time of the synchronous rectifying element can be finely adjusted by actively using the hysteresis width Vhs.

  The voltage level of the output signal of the first hysteresis comparator 610 is an inactive level at a time point t1 (practically, a time point t1 that exceeds the voltage of the AC signal VC1 intersects Samp (VA) (= H (Vth)). (L) changes to the active level (H), and the time t2 at which the AC voltage VC1 intersects L (Vth) (= Samp (VA) −Vhs) (in reality, it can also be called the time t2 below) The active level (H) changes to an inactive level (for example, L) in FIG.

  For example, if the hysteresis width Vhs is set to about 25 mV, for example, the potential difference can be reliably detected by the comparator. Therefore, the timing at which the output of the comparator changes from the active level (H) to the inactive level (L) is AC The timing at which the voltage VC1 intersects (Samp (VA) −Vhs) is determined accurately.

  In addition, the waveform of the AC voltage VC1 can be predicted at the time of design, and the hysteresis width Vhs is known. Therefore, the delay amount of the level inversion timing of the output signal of the first hysteresis comparator 610 due to the hysteresis width Vhs can be predicted at the time of design. Therefore, if the circuit design is optimized, for example, the loss due to the turn-on delay of the synchronous rectifier element can be minimized, or the backflow of charge due to the turn-off delay can be minimized. That is, by actively utilizing the hysteresis width Vhs, the on-time of the synchronous rectifying element can be finely adjusted.

(Example of hysteresis width setting)
A setting example of the hysteresis width Vhs of the first hysteresis comparator 610 will be described. FIGS. 5A and 5B are diagrams for explaining a setting example of the hysteresis width Vhs of the first hysteresis comparator.

  The example shown in FIG. 5A is the same as the example shown in the rightmost view of FIG. A point at which the AC voltage VC1 intersects the sampling voltage Samp (VA) (= first threshold voltage H (Vth)) is defined as a point and b point, and the AC voltage VC1 is the second threshold voltage (L (Vth)). Let c be the point that intersects. During the period from time t10 to time t12, the output signal e4 (e8) of the first hysteresis comparator 610 becomes the active level (H).

  The output signal e4 (e8) of the comparator 610 can also be used as the on / off control signal TG1 for the first synchronous rectifier element M1. Therefore, in FIG. 5A, e4 (e8) (= TG1) is described.

  Here, in a period TX (period from time t11 to time t12), a delay in turn-off of the synchronous rectifying element M1 corresponding to the hysteresis width Vhs occurs. For example, when the load is light, it is accumulated in the sampling capacitor. There may be a case where the charge slightly reverses. However, even in this case, since the voltage change of the AC voltage VC1 can be predicted and the hysteresis width Vhs is known at the circuit design stage, how much delay TX occurs at what load amount. Is predictable. Therefore, even if a reverse flow occurs by setting the appropriate hysteresis voltage Vhs, the amount can be suppressed to a minimum, and the degree of reduction in energy efficiency can be made particularly low. .

  Further, as described above, since the synchronous rectifying element M1 is accurately turned off at time t12, more accurate control of on / off of the synchronous rectifying element M1 is realized.

  In FIG. 5B, the AC voltage VC1 (the voltage at the point D) at time t21 is sampled to obtain samp (VA). The hysteresis width is set to Vhs. The first on / off control signal (TG1) is turned on during the period from time t21 to time t22.

(Specific example of timing control circuit configuration)
FIG. 6 is a diagram illustrating an example of a specific circuit configuration of the timing control circuit. The circuit example shown in FIG. 6 employs the circuit configuration shown in FIG. That is, the timing control circuit 200 in FIG. 6 includes a TG1 generation circuit 10a and a TG2 generation circuit 10b. The circuit configurations of the TG1 generation circuit 10a and the TG2 generation circuit 10b are the same. In FIG. 6, the same reference numerals are assigned to the same components. However, in the TG2 generation circuit 10b, a dash (') is added to the reference numerals of the respective components to distinguish them from the components of the TG1 generation circuit 10a. Hereinafter, the circuit configuration and operation of the TG1 generation circuit 10a will be described.

  The TG1 generation circuit 10a includes a resistor R1a and a resistor R2a, a resistor R1b and a resistor R2b, a sampling signal generation circuit 600, a sampling circuit 608, a hysteresis comparator (first hysteresis comparator) 610, and an output circuit 612. Have.

  The resistors R1a and R2a are voltage dividing resistors that divide the AC voltage VC1, and the resistor R2a is a resistor that forms a discharge path for discharging charges accumulated in the sampling capacitor Csamp included in the sampling circuit 608. But there is.

  The second hysteresis comparator 602 included in the sampling signal generation circuit 600 includes a voltage comparator CMP1 having a hysteresis width of +25 mV. In FIG. 6, in order to clarify the function of the hysteresis comparator, a virtual battery is connected to the non-inverting terminal of the voltage comparator CMP1. For example, when the output signal of the voltage comparator CMP1 is at the H level, the virtual battery electromotive force is +25 mV, and when the output signal of the voltage comparator CMP1 is at the L level, the virtual battery electromotive force is 0 mV. It becomes. The gate circuit 606 included in the sampling signal generation circuit 600 includes an inverter INV1 and an AND gate AND1.

  The sampling circuit 608 includes a switch circuit (sampling switch) SW1 for sampling the AC voltage VC1 and a sampling capacitor Csamp connected between the switch circuit (sampling switch) SW1 and VSS. On / off of the switch circuit (sampling switch) SW1 is controlled by a sampling signal CHG. A switch circuit (sampling switch) SW1 and a sampling capacitor Csamp constitute a sample hold circuit.

  In a period in which the sampling signal CHG is at an active level (for example, H level), the switch circuit (sampling switch) SW1 is turned on, whereby the AC voltage VC1 is sampled. Since the circuit configuration is simple, the area occupied by the circuit can be reduced.

  The first hysteresis comparator 610 includes a voltage comparator CMP2 having a hysteresis width of +25 mV. The output circuit 612 is configured by an AND gate AND2. The AND gate AND2 ANDs the output signal of the delay circuit 604 and the output signal of the voltage comparator CMP2 constituting the first hysteresis comparator 610 to generate the on / off control signal TG1 of the synchronous rectifier element.

  That is, the output circuit 612 (AND gate AND2) maintains the on / off control signal TG1 of the synchronous rectifying element M1 at the inactive level during the sampling period in which sampling is performed by the sampling circuit 608. During the period in which the sampling circuit 608 performs sampling, an accurate sampling voltage is not output, and the synchronous rectifying element on / off control signal TG1 cannot be generated with high accuracy. Therefore, an output circuit 612 is provided so that the on / off control signal of the synchronous rectifier element is maintained at an inactive level during the sampling period. As a result, the situation where the on / off control signal TG1 of the synchronous rectifying element M1 is generated and output at an undesired timing does not occur.

  FIG. 7 is a diagram for explaining the operation of the timing control circuit (TG1 generation circuit, TG2 generation circuit) shown in FIG. As described above, the hysteresis width Vhs of the first and second hysteresis comparators (602, 610) is set to 25 mV, for example.

  As shown in the upper side of FIG. 7, at time t1, the AC signal VC1 exceeds the rectified voltage Vout (that is, the sampling voltage Samp (VA)) (time t1, a1 point). The period from time t1 to time t2 is a sampling period, and during this period, the AC voltage VC1 (or rectified voltage Vout) is sampled by the sampling circuit 608. At time t2, the synchronous rectifying element M1 is turned on. At time t3, the AC voltage VC1 falls below the sampling voltage Samp (VA) (point a2). At time t4, the AC voltage VC1 falls below (Samp (VA) −Vhs) (point a3), thereby turning off the synchronous rectifier element M1. Thereafter, the same operation is repeated.

  Therefore, the synchronous rectification element M1 is turned on in the period T1 (time t2 to time t4) and in the period T2 (time t10 to time t12). That is, as shown in the lower side of FIG. 7, the on / off control signal TG1 of the synchronous rectifying element M1 is active level (H) in the period T1 (time t2 to time t4) and the period T2 (time t10 to time t12). ) And become inactive level (L) in other periods.

  Note that the on / off control signal TG2 of the synchronous rectifying element M2 becomes active level (H) in the period from time t7 to time t8 and in the period from time t15 to time t16. Therefore, the synchronous rectification element M2 is turned on in the period from time t7 to time t8 and in the period from time t15 to time t16.

  Note that when the synchronous rectifying element M1 (synchronous rectifying element M2) is turned on, the on-resistance is low, so that the AC voltage VC1 is very close to the rectified voltage Vout (or the reference potential VSS). In the figure, ΔVm1 and ΔVm2 are about several mV, for example.

  This will be specifically described below. The output signal CP011 of the voltage comparator CMP1 constituting the second hysteresis comparator 602 becomes H level during the period from time t1 to time t4 (and from time t9 to time t12). The signal CP011 is delayed by a predetermined time DL by the delay circuit 604, and a signal CP011D is obtained. The voltage level of the signal CP011D is inverted by the inverter INV1, and the signal XCP011D is obtained. The AND gate AND1 outputs a sampling pulse CHG having a pulse width corresponding to the delay time DL.

  In FIG. 7, the pulse width of the sampling pulse CHG is drawn to some extent for easy understanding, but actually, the pulse width of the sampling signal CHG is extremely narrow, and sampling is performed for a moment. In the present embodiment, the rise of the on / off control signal TG1 of the synchronous rectifier M1 is delayed by a time corresponding to the sampling period, but this delay can be ignored and does not affect the circuit operation.

  Further, the voltage at the non-inverting terminal of the voltage comparator CMP1 constituting the second hysteresis comparator 602 changes corresponding to the switching of the threshold value of the voltage comparator CMP1. That is, the voltage at the non-inverting terminal of the voltage comparator CMP1 is the rectified voltage Vout before time t1, becomes Vout−Vhs (CMP1) during the period from time t1 to time t4, and returns to the rectified voltage Vout at time t4. To do.

  The sampling voltage Samp (VA) output from the sampling circuit 608 is a DC voltage (discrete value voltage) on which noise is not superimposed.

  Further, the output voltage CP012 of the voltage comparator CMP2 constituting the first hysteresis comparator 610 becomes H level during the period from time t1 to time t4. The voltage at the non-inverting terminal of the voltage comparator CMP2 changes corresponding to the switching of the threshold value of the voltage comparator CMP2. That is, the voltage at the non-inverting terminal of the voltage comparator CMP2 is Samp (VA) before the time t1, and becomes Samp (VA) −Vhs (CMP2) in the period from the time t1 to the time t4, and is sampled at the time t4. It returns to the voltage Samp (VA). During the period from time t2 to time t4, the on / off control signal TG1 of the synchronous rectifying element M1 becomes an active level.

(Specific circuit configuration example of hysteresis comparator)
8A and 8B are diagrams illustrating an example of a specific circuit configuration of the hysteresis comparator.

  The circuit shown in FIG. 8A includes a differential circuit (configured by four MOS transistors MP1, MP2, MN1, MN2 and a constant current source I1), a source-grounded MOS transistor MN3, and a constant current source I2. And an output buffer (configured by six MOS transistors MP3, MP4, MN4, MN5, MP5, MP6 and current limiting resistors Rk1 and Rk2). One of the two MOS transistors (MP5, MN6) constituting the output buffer is turned on in accordance with the voltage level of the output voltage Vout, thereby forming a positive feedback loop.

The circuit shown in FIG. 8B includes a differential circuit (configured by four MOS transistors MP1, MP2, MN1, MN2 and a constant current source I1), a MOS transistor MP10 for forming a positive feedback loop, and MN10, a source-grounded MOS transistor MN3, a constant current source I2, and an output buffer (configured by four MOS transistors MP11, MN11, MP12, and MN12) configured by a two-stage CMOS inverter. When the MOS transistor MN10 is turned on, a positive feedback loop is formed.

(Second Embodiment)
FIG. 9 is a diagram illustrating another example of the specific circuit configuration of the timing control circuit (an example in which an output guarantee circuit is provided). In the present embodiment, the output guarantee for maintaining the on / off control signals (TG1 to TG4) of the synchronous rectifier elements (M1 to M4) at the inactive level (L) until the rectified voltage Vout becomes equal to or higher than a given voltage level. A circuit 350 is provided.

  The timing control circuit 200 included in the rectification control device 250 may operate using the rectified voltage Vout obtained from the full-wave rectifier circuit 150 as a power supply voltage. For example, when the full-wave rectification circuit 150 and the rectification control device 250 are provided in a power receiving device of a contactless power transmission system, the rectification control device 250 operates using the rectified voltage Vout of the full-wave rectification circuit 150 as a power supply voltage.

  In this case, if the timing control circuit 200 is operated during a period in which the voltage level of the rectified voltage Vout as the power supply voltage does not reach a given voltage level, the circuit operation becomes unstable due to insufficient power supply voltage, and normal In some cases, on / off control of the synchronous rectifier element cannot be performed. For example, the first and second rectifier elements (M1, M2) are simultaneously turned on, and a large through current flows from the first node N1 toward the second node N2, thereby reducing the energy efficiency of the full-wave rectifier circuit 150. Alternatively, a situation may occur where the element is damaged.

  Therefore, in this embodiment, for example, as shown in FIG. 9, an output assurance circuit 350 is provided in the on / off control signal generation circuit 10a. The output guarantee circuit 350 ensures that the on / off control signal TG1 of the synchronous rectifying element M1 output from the timing control circuit 200 is a normal control voltage. Therefore, the reliability of control of the synchronous rectification element by the rectification control device 250 is improved.

  The output guarantee circuit 350 includes a voltage dividing resistor R100 and R101, a source grounded NMOS transistor MN100, a load resistor R100, a source grounded PMOS transistor MP100, and a CMOS inverter (PMOS transistor MP101 and NMOS transistor MN101 functioning as an output buffer). And a pull-down resistor R103 for pulling down the output node of the CMOS inverter.

  The NMOS transistor MN100 is not turned on until the rectified voltage Vout becomes equal to or higher than a given voltage level. During the period when the NMOS transistor MN100 is off, the power supply voltage (Vout = VDD) is not supplied to the CMOS inverters (MP101, MN101), and the output node of the CMOS inverter is set to the L level (ground potential) by the pull-down resistor R103. Retained. Therefore, the on / off control signal TG1 is maintained at the inactive level (L), and the NMOS transistor M1 serving as the synchronous rectifying element maintains the off state.

  In this way, all the synchronous rectifier elements (for example, M1 to M4) are turned off until the rectified voltage Vout as the power supply voltage rises to a given level. In this state, a rectification operation is performed by each body diode (DP1 to DP4) connected in parallel to each synchronous rectifier element. Therefore, for example, a situation in which the first and second synchronous rectifying elements (M1, M2) are turned on at the same time and a large through current flows does not occur. Therefore, a reduction in energy efficiency of full wave rectifier circuit 150 is prevented. Further, since there is no possibility of damage to the element, the reliability of the device on which the full-wave rectifier circuit is mounted is improved.

  The NMOS transistor MN100 is turned on when the rectified voltage Vout becomes a normal voltage level. Accordingly, the on / off control signal TG1 can be set to an active level based on the output signal of the first hysteresis comparator 610.

(Third embodiment)
FIG. 10 is a diagram illustrating another example of a specific circuit configuration of the timing control circuit (an example in which a sampling circuit is commonly used). In this embodiment, the logic circuit LGC and the sampling circuit 608 included in the sampling signal generation circuit 600 are used to generate the first and second on / off control signals (TG1, TG2). That is, the logic circuit LGC and the sampling circuit 608 are commonly used to generate the first and second on / off control signals (TG1, TG2). As a result, the circuit configuration can be simplified, the area occupied by the circuit can be reduced, and the power consumption can be reduced.

  In this embodiment, the rectified voltage Vout is sampled. That is, when the AC voltage VC1 input to the first node N1 of the rectifier bridge 100 exceeds the rectified voltage Vout, the sampling circuit 608 samples the rectified voltage Vout, and the AC voltage input to the second node of the rectifier bridge. When (VC2) exceeds the rectified voltage (Vout), the rectified voltage Vout is sampled.

  In this case, only the rectified voltage Vout is to be sampled. Further, the generation of the first on / off control signal TG1 and the generation of the second on / off control signal TG2 are not performed simultaneously.

  Therefore, it is possible to use one sampling circuit 608 and the logic circuit LGC included in the sampling signal generation circuit in a time division manner. Therefore, sharing of the sampling circuit 608 is realized.

  In FIG. 10, the same reference numerals are given to the portions common to the above-mentioned drawings. The basic configuration and circuit operation of the circuit of this embodiment are the same as those of the above-described embodiments. In FIG. 10, the notation (COM) is added to the end of the reference numerals of commonly used circuits.

  As shown in FIG. 10, the logic circuit LGC (COM) and the sampling circuit 608 (COM) are commonly used for generating the first and second on / off control signals (TG1, TG2). .

  The OR gate OR is provided to input the output signal of the voltage comparator CMP1 or the output signal of the voltage comparator CMP1 'to the logic circuit LGC (COM).

  In the circuit of FIG. 10, the output circuit 612 (612 ') is configured by a NAND gate NAND1 (NAND1'). Then, the output signal of the second hysteresis comparator 602 (602 ') and the output signal of the first hysteresis comparator 610 (610') are input to the NAND gate NAND1 (NAND1 ').

  Therefore, in the circuit of FIG. 10, in the period in which both the output signal of the second hysteresis comparator 602 (602 ′) and the output signal of the first hysteresis comparator 610 (610 ′) are at the active level, Off control signals (TG1, TG2) are generated.

  With this configuration, for example, even when the synchronous rectifier continues to be turned on until the polarity of the AC voltage input to the rectifier bridge is reversed, the on / off control is reliably turned off by the output signal of the second hysteresis comparator. Can be made. Therefore, safety is improved.

(Fourth embodiment)
FIG. 11 is a diagram illustrating another example of a specific circuit configuration of the timing control circuit (an example in which a sampling circuit and a hysteresis comparator are used in common).

  In the present embodiment, not only the sampling circuit 608 but also the first hysteresis comparator 610 and the second hysteresis comparator 602 are commonly used for generating the first and second on / off control signals. That is, in this embodiment, the sampling signal generation circuit 600 and the output circuit 612 can be used in common. By sharing each circuit, it is possible to further simplify the circuit configuration, further reduce the area occupied by the circuit, and further reduce power consumption.

  In FIG. 11, the same reference numerals are given to the portions common to the above-mentioned drawings. The basic configuration and circuit operation of the circuit of this embodiment are the same as those of the above-described embodiments. In FIG. 11, the notation (COM) is added to the end of the reference numerals of the commonly used circuits.

  The on / off control signal generation circuit (TG1, TG2 generation circuit) 10 of FIG. 11 includes a first common hysteresis comparator 610 (COM), a second common hysteresis comparator 602 (COM), and a common sampling circuit 608 (COM). ) And the second common hysteresis comparator 602 (COM) are switched by the switching control signal PL to input either the AC voltage VC1 at the first node N1 or the AC voltage VC2 at the second node N2 of the rectifier bridge 100. The output signal of the input changeover switch SW2 and the first common hysteresis comparator (610 (COM)) is output toward the first synchronous rectifier element M1 or output toward the second synchronous rectifier element M2. Or a distribution circuit 13 for switching based on the switching control signal PL. The comparison circuit (CMP3) that generates the switching control signal PL by comparing the voltage (VC1) of the first node N1 and the voltage (VC2) of the second node N2, and the second common output circuit 612 (COM) ( AND gate AND3 (COM)).

  In FIG. 11, a capacitor C3 for stabilizing the voltage is provided after the changeover switch SW2. The distribution circuit 13 includes two NAND gates (NAND5 and NAND6) and an inverter INV3.

  In the present embodiment, each of the common sampling circuit 608 (COM), the first common hysteresis comparator 610 (COM), and the second common hysteresis comparator 602 (COM) is connected to the first and second on / off control signals ( Commonly used for generation of TG1, TG2). By sharing each circuit, it is possible to further simplify the circuit configuration, further reduce the area occupied by the circuit, and further reduce power consumption.

  In this embodiment, the rectified voltage Vout is sampled. The generation of the first on / off control signal TG1 and the generation of the second on / off control signal TG2 are not performed simultaneously. Therefore, by using each circuit in a time-sharing manner, the first and second hysteresis comparators (610 (COM), 602 (COM)) and the sampling circuit 608 (COM) can be shared.

  In the present embodiment, whether the AC voltage VC1 at the first node N1 or the AC voltage VC2 at the second node N2 is supplied to the second common hysteresis comparator 602 (COM) is switched by the changeover switch SW2. The operation of the changeover switch SW2 is controlled by a changeover control signal PL output from the comparison circuit CMP3. That is, in a state where the changeover switch SW2 is switched to the a terminal side, the AC voltage VC1 is supplied to the second common hysteresis comparator 602 (COM), and in a state where the changeover switch SW2 is switched to the b terminal side, The AC voltage VC2 is supplied to the second common hysteresis comparator 602 (COM).

  In addition, a signal output from the first common hysteresis comparator 610 (COM) (more specifically, a signal output from the second common output circuit 612 (COM)) is used for the first synchronous rectifier element. Whether the signal is output as the first on / off control signal TG1 or the second on / off control signal TG2 for the second synchronous rectifying element is indicated by the distribution circuit 13 (indicated by a thick dotted line in the figure). Controlled). The distribution destination of the signal by the distribution circuit 13 is controlled by the switching control signal PL output from the comparison circuit CMP3.

(Fifth embodiment)
In the present embodiment, a power receiving device equipped with a rectification control device and a full-wave rectifier circuit of the present invention, and a contactless power transmission system configured using the power receiving device will be described.

  In the present embodiment, the rectification control device and the full-wave rectification circuit described above are provided in the power receiving device of the non-contact power system. The power receiving device is operated by the rectified voltage output from the full-wave rectifier circuit, and power is supplied to a load (for example, a secondary battery) to be fed. Since the loss in the full-wave rectifier circuit is small and high energy efficiency is realized, the transmission efficiency of the non-contact power transmission system is improved. This will be specifically described below.

(Example of the configuration of electronic equipment that supports contactless power transmission)
12A to 12C are diagrams illustrating an example of a configuration of an electronic device corresponding to the contactless power transmission system. FIG. 1A shows a charger (cradle) 500 incorporating the power transmission device 11 and a mobile phone 510 incorporating the power reception device 41.

  The mobile phone 510 includes a display unit 512 such as an LCD, an operation unit 514 including buttons and the like, a microphone 516 (sound input unit), a speaker 518 (sound output unit), and an antenna 520.

  Electric power is supplied to the charger 500 via the AC adapter 502, and this electric power is transmitted from the power transmitting device 11 to the power receiving device 41 by contactless power transmission. Thereby, a battery (not shown) of the mobile phone 510 can be charged, or a device in the mobile phone 510 can be operated.

  The electronic device to which this embodiment is applied is not limited to the mobile phone 510. For example, the present invention can be applied to various electronic devices such as wristwatches, cordless telephones, shavers, electric toothbrushes, wrist computers, handy terminals, portable information terminals, electric bicycles, and IC cards.

  As schematically shown in FIG. 12B, power transmission from the power transmission device 11 to the power reception device 41 is provided on the primary coil L1 (power transmission coil) provided on the power transmission device 11 side and on the power reception device 41 side. This is realized by electromagnetically coupling the secondary coil L2 (power receiving coil) formed to form a power transmission transformer. Thereby, non-contact power transmission becomes possible.

  In FIG. 12B, the primary coil L1 and the secondary coil L2 are, for example, air-core planar coils formed by winding coil wires in a spiral shape on a plane. However, the coil of the present embodiment is not limited to this, and any shape, structure, or the like may be used as long as the primary coil L1 and the secondary coil L2 can be electromagnetically coupled to transmit power.

  For example, in FIG. 12C, the primary coil L1 is formed by winding a coil wire around the X axis in a spiral shape around the magnetic core. The same applies to the secondary coil L2 provided in the mobile phone 510. This embodiment can also be applied to a coil as shown in FIG. In the case of FIG. 1 (C), as the primary coil L1 and the secondary coil L2, in addition to the coil wound around the X axis, a coil wound around the Y axis may be combined. .

(Configuration example of contactless power transmission system)
FIG. 13 is a diagram illustrating an example of a configuration of a contactless power transmission system. The power transmission device 11 includes a primary coil L1, a resonance capacitor CQ, a power transmission control device (power transmission control IC) 50, a power transmission unit 53, and a waveform monitor circuit 54. The power transmission control device 50 includes a power transmission side control circuit 51 and a driver control circuit 52. The driver control device 52 AC drives the primary coil L1 in synchronization with the drive clock DRCK. As a result, electric power can be supplied from the primary side to the secondary side without contact. The drive frequency of the primary coil is, for example, 120 KHz.

  The power receiving device 41 includes a secondary coil L2, a power receiving unit 140, a rectification control device (rectification control IC) 250, a load modulation unit 60, a power supply control unit 62, and a battery device 70 (charge control device 71). And a power reception control device (power reception control IC) 80.

  As shown in a thick dotted line in the upper left of FIG. 13, as a communication method for transmitting a signal from the primary side to the secondary side, the frequency modulation method (switching between frequencies f1 and f2 is changed to “1” and “1”. 0 "is used).

  Further, as indicated by a thick dotted line in the lower left of FIG. 13, a load modulation method is adopted as a communication method for transmitting a signal from the secondary side to the primary side. That is, “0” and “1” are transmitted from the secondary side to the primary side by switching the load state on the secondary side. On the primary side, the coil end voltage GSG of the primary coil L1 is monitored by the waveform monitor circuit 54, for example, the change in the amplitude of the coil end voltage is detected, or the phase relationship between the drive clock and the coil end voltage is detected. Thus, “0” or “1” is detected.

  The power receiving unit 140 shown in FIG. 13 includes voltage dividing resistors RB1 and RB2 connected in series between the coil ends of the secondary coil L2, a full-wave rectifier circuit 150, a rectified voltage node N11, and a reference potential node N13. And voltage dividing resistors RB4 and RB5 connected in series therebetween.

  The full-wave rectifier circuit 150 includes a rectifier bridge 100 and a smoothing capacitor C1. The rectifier bridge 100 includes MOSFETs (M1 to M4) as synchronous rectifier elements.

  The rectification control device (rectification control IC) includes a timing control circuit 200. The timing control circuit 200 employs the on / off control signal generation circuit 10 (here, the circuit configuration shown in FIG. 3A). Therefore, the on / off control signal generation circuit 10 includes the TG1 generation circuits 10a and TG2. A generation circuit 10b), an output guarantee circuit 350 (see FIG. 11), a level shift circuit (LS1 to LS4), and an output buffer (BM1 to BM4).

  Further, the rectification control device (rectification control IC) 250 has a plurality of terminals (E1 to E9). Each of the terminals (E1 to E4) is an output terminal for supplying the on / off control signal (TG1, TG3, TG2, TG4) of the synchronous rectifier to the rectifier bridge 100.

  The terminal E5 is an input terminal for supplying the AC voltage VC2 at the second node N2 of the rectifier bridge 100 to the on / off control signal generation circuit 10. The terminal E6 is an input terminal for supplying the AC voltage VC1 input to the first node N1 to the on / off control signal generation circuit 10. The terminal E7 is an input terminal for supplying the output assurance circuit 350 with the rectified voltage Vout obtained from the third node N3. The terminal E8 is an input terminal for supplying the rectified voltage Vout to the on / off control signal generation circuit 10. The terminal E9 is an input terminal for supplying the reference potential VSS connected to the fourth node N4 in the rectifier bridge 100 to the on / off control signal generation circuit 10.

  The output guarantee circuit 350 is a circuit for guaranteeing that the on / off control signals (TG1 to TG4) of the synchronous rectifying elements output from the timing control circuit 200 are normal control voltages. In the power receiving device 41 of FIG. 13, the rectification control device 250 (and other power receiving side circuits) operates using the rectified voltage Vout of the full-wave rectifier circuit 150 as a power supply voltage. Therefore, when the timing control circuit 200 is operated in a period in which the voltage level of the rectified voltage Vout as the power supply voltage does not reach a given voltage level (for example, a period immediately after the power of the contactless power transmission system is turned on) The circuit operation becomes unstable due to an insufficient power supply voltage, and there may be a case where normal on / off control of the synchronous rectifier elements (M1 to M4) cannot be performed. For example, a situation may occur in which the first and second rectifier elements (M1, M2) are simultaneously turned on, a large through current flows, and the energy efficiency of the full-wave rectifier circuit 150 is reduced.

  Therefore, in this embodiment, the output control circuit 350 is provided in the timing control circuit 200. The output guarantee circuit 350 does not turn on / off control signals (TG1 to TG4) of the synchronous rectifier element until the rectified voltage Vout reaches a given voltage level (that is, a voltage level at which the timing control circuit can operate normally). It is maintained at an active level (specifically, L level). Thereby, each of the plurality of synchronous rectifier elements (M1 to M4) is turned off until the rectified voltage Vout as the power supply voltage rises to a given level, and in that state, each of the synchronous rectifier elements (M1 to M4) Are rectified by the body diodes (DP1 to DP4) connected in parallel with each other. Therefore, for example, a situation in which the first and second synchronous rectifying elements (M1, M2) are turned on at the same time and a large through current flows does not occur.

  Further, the load modulation unit 60 switches a load modulation transistor (not shown) and transmits a load modulation signal to the power transmission device 11. The power supply control unit 62 includes, for example, a series regulator (LDO), a power supply control transistor, and the like (not shown), and controls power supply to the load 72 to be supplied by controlling the operation thereof. A charging control device (charging control IC) 71 included in the battery device 70 controls the charging operation of the battery (secondary battery) 72.

  Note that the load to be fed is not limited to the battery (secondary battery) 72. For example, when a given circuit is operated by a rectified voltage, the circuit functions as a load to be fed.

  The power receiving device (power reception control IC) includes a power reception side control circuit 81, a position detection circuit 82, a frequency detection circuit 83, and an oscillation circuit 84. The power receiving side control circuit 81 comprehensively controls the operation of the power receiving device 41.

  The position detection circuit 82 detects whether or not the power receiving side device is set at an appropriate position with respect to the power transmission side device based on the signal ADIN obtained from the common connection point of the voltage dividing resistors RB4 and RB5. Further, the frequency detection circuit 83 regenerates the primary side drive clock (DRCK) based on the signal CCMPI obtained from the common connection point of the voltage dividing resistors RB1 and RB2, and the frequency of the drive clock is determined by the oscillation circuit 84. Is detected by using the oscillation clock CLK output from. The frequency of the oscillation clock CLK is, for example, 5 MHz.

  As described above, the power receiving device 41 of the present embodiment includes the synchronous rectification type full-wave rectification circuit 150, the rectification control device 250, and the power supply control unit 62, and is output from the full-wave rectification circuit 150. The power receiving device 41 is operated by the rectified voltage Vout, and power is supplied to the load to be fed (for example, the secondary battery 72).

  According to the present embodiment, stable and highly accurate on / off timing control of the synchronous rectifying element, which is not conventionally performed, is realized. Therefore, there is little loss in the full-wave rectifier circuit 150, heat generation is reduced, high energy efficiency is realized, and transmission efficiency of the non-contact power transmission system is significantly improved.

  Further, since the rectification control device 250 has the output guarantee circuit 350, an unnecessary through current is prevented from flowing immediately after the system is started, and there is no fear that the circuit is damaged by the through current. Therefore, a contactless power transmission system with high energy efficiency and high reliability is realized.

  In the example of FIG. 13, the full-wave rectification circuit 150 and the rectification control device 250 are separate circuits, but the synchronous rectification elements (M1 to M4) constituting the rectification bridge 100 are elements with a relatively low breakdown voltage. In some cases, the rectification bridge 100 may be built in the rectification control device 250. In this case, the number of parts of the non-contact power transmission system can be reduced.

  Further, when the capacity of the smoothing capacitor C1 is relatively small, the rectifier bridge 100, the smoothing capacitor C1, and the rectification control device 250 may be incorporated in one IC. In this case, a full-wave rectifier circuit with a rectification control device is realized. This full-wave rectifier circuit can control on / off of the synchronous rectifier elements (M1 to M4) at an appropriate timing, and can reduce loss due to the body diode. In addition, since the backflow of charges accumulated in the smoothing capacitor C1 is effectively prevented, a synchronous rectification type full-wave rectification circuit with low loss and high energy efficiency can be realized.

(Operation example of contactless power transmission system)
FIG. 14 is a diagram illustrating an example of the operation of the non-contact power transmission system. In the standby state, the power transmission control device 11 built in the power transmission side device (cradle) 500 detects the landing (setting) of the power reception side device (cellular phone) 510, for example, once every 0.3 seconds (step). S1) Thereby, the landing (setting) of the power receiving device is detected (step S2).

  Next, various information exchanges (negotiations) are performed between the power transmission device 11 and the power reception device 41 (step S3). Normal power transmission (charging) is started after it is confirmed by ID authentication that the power receiving apparatus is an appropriate power transmission target. When normal power transmission is started, an LED provided in the power receiving device (cellular phone) 510 is turned on.

  When full charge is detected during normal power transmission, a full charge notification is transmitted from the power receiving apparatus to the power transmission apparatus, and the power transmission apparatus that has received this notification stops normal power transmission (step S4). When normal power transmission is stopped, the LED provided in the power receiving device (cellular phone) 510 is turned off. And it transfers to the standby phase after full charge detection (step S5).

  In a standby state after full charge detection, for example, removal detection is executed once every 5 seconds, and confirmation of the necessity of recharging is executed once every 10 minutes. When the power receiving device (cellular phone) 510 is removed after full charge, the process returns to the initial standby phase (step S6). If it is determined that recharging is necessary after full charging, the process returns to step S3 (step S7). If the removal of the power receiving device (cellular phone) 510 is detected in the state of step 3, the apparatus returns to the initial standby state (step S8).

  As described above, according to some embodiments of the present invention, for example, the on / off timing of the synchronous rectification element constituting the synchronous rectification type full-wave rectification circuit can be controlled with high accuracy. A simple rectification control device can be realized. Therefore, the loss and heat generation of the full-wave rectifier circuit can be reduced, and the energy efficiency can be improved.

  In addition, by using the rectification control device and the full-wave rectification circuit, it is possible to realize a power receiving device and a non-contact power transmission system in which transmission efficiency is significantly improved.

  Although the embodiments of the present invention have been described in detail, those skilled in the art will readily understand that many modifications are possible without departing from the novel matters and effects of the present invention. Therefore, all such modifications are included in the present invention.

  For example, various switching elements can be used as the synchronous rectifying element. Further, for example, the configuration of the rectifying bridge is not limited to the above-described embodiment, and various circuit configurations can be adopted.

  The rectification control device can also perform on / off control of the synchronous rectification element in the synchronous rectification half-wave rectification circuit. Also, the configuration of the on / off control signal generation circuit included in the timing control circuit can be variously modified or applied.

  The rectification control device and full-wave rectification of the present invention can be mounted on various electronic devices because the circuit configuration is simplified and the loss is small.

  The present invention is useful, for example, as a rectification control device, a full-wave rectification circuit, a power reception device, and a contactless power transmission system.

1A to 1C are diagrams for describing an example of a configuration of a synchronous rectification type full-wave rectification circuit and a rectification control device. The figure which shows an example of an internal structure of the timing control circuit contained in a rectification | straightening control apparatus 3A and 3B are diagrams showing another example of the internal configuration of the timing control circuit included in the rectification control device. 4A and 4B are diagrams for explaining the outline of the configuration and operation of an on / off control signal generation circuit (here, a TG1 generation circuit). 5A and 5B are diagrams for explaining an example of setting the hysteresis width Vhs of the first hysteresis comparator. The figure which shows an example of the concrete circuit structure of a timing control circuit The figure for demonstrating operation | movement of the timing control circuit (TG1 generation circuit, TG2 generation circuit) shown by FIG. 8A and 8B are diagrams illustrating an example of a specific circuit configuration of the hysteresis comparator. The figure which shows the other example (example which provides an output guarantee circuit) of the concrete circuit structure of a timing control circuit The figure which shows the other example (example which uses a sampling circuit in common) of the concrete circuit structure of a timing control circuit FIG. 10 is a diagram illustrating another example of a specific circuit configuration of the timing control circuit (an example in which a sampling circuit and a hysteresis comparator are commonly used). 12A to 12C are diagrams illustrating an example of a configuration of an electronic device corresponding to a contactless power transmission system. The figure which shows an example of a structure of a non-contact electric power transmission system The figure which shows an example of operation | movement of a non-contact electric power transmission system

Explanation of symbols

L1 primary coil, L2 secondary coil, M1-M4 synchronous rectifier (MOSFET),
10 (10a to 10d) on / off control signal generation circuit (TG1 to TG4 generation circuit),
100 rectifier bridge, LQ load, C1 smoothing capacitor,
ON / OFF control signal generation circuit (TG1 generation circuit to TG4 generation circuit),
150 full-wave rectifier circuit, 200 timing control circuit,
250 rectification control device (for example, IC), 600 sampling signal generation circuit,
602 hysteresis comparator (second hysteresis comparator),
604 delay circuit, 606 gate circuit (first gate circuit),
608 sampling circuit, LGC logic circuit,
610 hysteresis comparator (first hysteresis comparator),
612 output circuit, DP1 to DP4 body diode,
SW1 sampling switch, Csamp sampling capacitor,
VSS reference potential, VC1, VC2 AC voltage, Vout rectified voltage,
TG1 to TG4 First / fourth synchronous rectifier on / off control signals

Claims (17)

A rectification control device for controlling on / off of at least one of the plurality of synchronous rectification elements in a full-wave rectification circuit including a rectification bridge including a plurality of synchronous rectification elements and a smoothing capacitor connected to the rectification bridge. There,
A timing control circuit for controlling on / off of at least one of the plurality of synchronous rectifying elements by at least one on / off control signal;
The timing control circuit includes an on / off control signal generation circuit that generates a first on / off control signal that is one of the at least one on / off control signal;
The on / off control signal generation circuit includes:
A sampling circuit that samples any one of an AC voltage input to the rectifier bridge, a rectified voltage output from the rectifier bridge, and a reference voltage of the rectifier bridge;
A first comparator for comparing the sampling voltage sampled by the sampling circuit with the AC voltage;
And the first on / off control signal is generated based on the output signal of the first comparator. The rectification control device according to claim 1,
The first comparator comprises a first hysteresis comparator;
The threshold voltage of the first hysteresis comparator is the first threshold voltage when the voltage level of the output signal of the first hysteresis comparator is L level, and the voltage level of the output signal of the first hysteresis comparator is When it is at the H level, it is the second threshold voltage, and the hysteresis width determined by the difference voltage between the first threshold voltage and the second threshold voltage is the noise width superimposed on the AC voltage. A rectification control device, wherein the first hysteresis comparator is set to a voltage at which it becomes insensitive. The rectification control device according to claim 1 or 2, wherein
The on / off control signal generation circuit includes:
A sampling signal generation circuit for generating a sampling signal for determining a sampling timing of the sampling circuit;
The sampling signal generation circuit includes:
A second hysteresis comparator that compares the AC voltage with the rectified voltage or a reference voltage of the rectifier bridge and outputs a timing signal for generating the sampling signal;
A logic circuit for generating the sampling signal based on the timing signal;
A rectification control device comprising: The rectification control device according to claim 3,
The sampling circuit is
A sampling switch whose on / off is controlled by the sampling signal output from the sampling signal generation circuit;
A sampling capacitor connected between the sampling switch and a given potential;
A rectification control device comprising: A rectification control device according to any one of claims 1 to 4, wherein
An output circuit that generates and outputs an on / off control signal of the synchronous rectifier based on an output signal of the first comparator;
The output circuit maintains an on / off control signal of the synchronous rectifying element at an inactive level during a sampling period in which the sampling is performed by the sampling circuit. A rectification control device according to any one of claims 1 to 4, wherein
An output circuit for generating an on / off control signal for the synchronous rectifying element based on an output signal of the first comparator;
The output circuit activates the on / off control signal of the synchronous rectifier element in a period in which the output signal of the second hysteresis comparator is at an active level and the output signal of the first comparator is at an active level. A rectification control device characterized by a level. The rectification control device according to any one of claims 1 to 6,
The AC voltage is input to the first node and the second node of the rectifier bridge, the rectified voltage is output from the third node, the reference voltage is supplied to the fourth node, and the smoothing capacitor is supplied to the third node. Is connected,
The first on / off control signal generated by the on / off control signal generation circuit is generated between the m-th node (m is 1 or 2) and the n-th node (n is 3 or 4) of the rectifier bridge. Used for on / off control of a synchronous rectifier connected between
The sampling circuit included in the on / off control signal generation circuit may be configured such that the voltage at the m-th node or the voltage at the n-th node when the voltage at the m-th node crosses the voltage at the n-th node Sample
The first comparator compares the sampling voltage with the voltage of the m-th node. A rectification control device according to any one of claims 1 to 7,
The timing control circuit operates using the rectified voltage output from the rectifier bridge as a power supply voltage,
The on / off control signal generation circuit further includes an output guarantee circuit that maintains the first on / off control signal at an inactive level until the rectified voltage becomes equal to or higher than a given voltage level. The rectification control device. The rectification control device according to claim 7,
The on / off control signal generation circuit controls the first on-off for controlling on / off of a first synchronous rectifier element connected between the first node and the third node of the rectifier bridge. A second on / off control signal for controlling on / off of a second synchronous rectifying element connected between the second node and the third node of the rectifier bridge, Generate
The sampling circuit included in the on / off control signal generation circuit is commonly used for generating both the first on / off control signal and the second on / off control signal. Rectification control device. The rectification control device according to claim 7,
The on / off control signal generation circuit includes: a first on / off control signal for controlling on / off of a first synchronous rectifier element connected between the first node and the third node; Generating a second on / off control signal for controlling on / off of a second synchronous rectifying element connected between the second node and the third node; and
Each of the first comparator and the sampling circuit included in the on / off control signal generation circuit generates both the first on / off control signal and the second on / off control signal. Commonly used,
A distribution circuit for switching whether the output signal of the first comparator is output as the first on / off control signal or the second on / off control signal based on the switching control signal When,
A comparison circuit that compares the voltage of the first node with the voltage of the second node to generate the switching control signal;
A rectification control device comprising: The commutation control device according to claim 10,
A sampling signal generation circuit that generates a sampling signal for determining a sampling timing of the sampling circuit; and the sampling signal generation circuit compares the AC voltage with the rectified voltage or the reference voltage of the rectifier bridge, A second comparator that outputs a timing signal for generating the sampling signal;
The second comparator is commonly used to generate both the first and second on / off control signals; and
A rectification control device comprising a changeover switch that is switched by the changeover control signal to supply the second comparator with either the AC voltage at the first node or the AC voltage at the second node. It is the rectification | straightening control apparatus in any one of Claims 1-11,
The rectification control device includes:
A rectification control device comprising the rectification bridge. A rectifier bridge including a plurality of synchronous rectifier elements;
A smoothing capacitor connected to the rectifier bridge;
The rectification control device according to any one of claims 1 to 12, wherein at least one on / off of the plurality of synchronous rectification elements is controlled by at least one on / off control signal. A full-wave rectifier circuit. The power receiving device in a non-contact power transmission system that electromagnetically couples a primary coil and a secondary coil to transmit power from the power transmitting device to the power receiving device,
A full-wave rectifier circuit including a rectifier bridge including a plurality of synchronous rectifier elements and a smoothing capacitor;
A rectification control device according to any one of claims 1 to 12,
A power receiving device comprising:   A non-contact power transmission system, wherein the primary coil and the secondary coil are electromagnetically coupled to transmit power from the power transmission device to the power reception device according to claim 14.   An electronic apparatus comprising the rectification control device according to claim 1.   An electronic apparatus comprising the full-wave rectifier circuit according to claim 13.

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