KR970022352A

KR970022352A - Handler with Multiple Test Structures for Semiconductor Devices

Info

Publication number: KR970022352A
Application number: KR1019950037825A
Authority: KR
Inventors: 박윤순; 오창수
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1995-10-28
Filing date: 1995-10-28
Publication date: 1997-05-28

Abstract

본 발명은 하나의 반도체 장치에 대하여 복수의 특성 테스트를 연속적으로 하나의 설비로 수행할 수 있도록 한 반도체 장치의 다중 테스트 구조를 갖는 핸들러에 관한 것이다.The present invention relates to a handler having a multi-test structure of a semiconductor device, which enables a plurality of characteristic tests to be continuously performed with one facility for one semiconductor device.

본 발명에 따른 반도체 장치의 다중 테스트 구조를 갖는 핸들러는, 자재로딩부; 양품로딩부; 불량품로딩부; 자재로딩부로부터 반도체 장치를 로딩하여 제1자동테스트장치로부터 인가되는 특성 테스트 신호를 이용하여 테스트 공정을 수행하는 제1테스트 사이트; 제1테스트 사이트에서 양품으로 판정된 반도체 장치를 로딩하여 후속 테스트 공정으로 로딩시키기 위하여 임시대기 시키는 버퍼; 및 버퍼에 대기된 반도체 장치를 로딩하여 제2자동테스트장치로부터 인가되는 특성 테스트 신호를 이용하여 테스트 공정을 수행하는 제2테스트 사이트; 를 포함하여 구성됨을 특징으로 한다.A handler having multiple test structures of a semiconductor device according to the present invention includes: a material loading unit; Good quality loading part; Defective product loading unit; A first test site which loads the semiconductor device from the material loading unit and performs a test process using a characteristic test signal applied from the first automatic test apparatus; A buffer which temporarily loads the semiconductor device determined as good at the first test site and waits for loading into a subsequent test process; And a second test site which loads the semiconductor device held in the buffer and performs a test process using the characteristic test signal applied from the second automatic test device. Characterized in that configured to include.

본 발명에 의하면, 만일 설비가 단일화 되며, 작업성이 향상되고, 공정이 효율적으로 수행될 수 있는 효과가 있다.According to the present invention, if the equipment is unified, workability is improved, and the process can be efficiently performed.

Description

Handler with Multiple Test Structures for Semiconductor Devices

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 반도체 장치의 전특성을 테스트하기 위한 종래의 자동테스트 장치에 연결된 핸들러를 나타내는 도면이다,1 is a diagram illustrating a handler connected to a conventional automatic test apparatus for testing all characteristics of a semiconductor device.

제2도는 하나의 반도체 장치에 대하여 각 특성별로 테스트 공정을 수행하기 위한 종래의 다수의 자동테스트장치에 각각 핸들러가 연결된 것을 나타내는 도면이다,FIG. 2 is a diagram illustrating that a handler is connected to a plurality of conventional automatic test apparatuses for performing a test process for each characteristic of one semiconductor device.

제3도는 본 발명에 따른 반도체 장치의 다중 테스트 구조를 갖는 핸들러의 실시예를 나타내는 도면이다.3 is a diagram illustrating an embodiment of a handler having multiple test structures of a semiconductor device according to the present invention.

Claims

A handler having a multi-test structure of a semiconductor device configured to test a plurality of characteristics with respect to a single semiconductor device using a plurality of automatic test devices to separately load good and defective products; A material loading unit waiting the semiconductor device to be tested; A good quality loading unit into which a semiconductor device judged as good quality is loaded; A defective article loading unit in which a semiconductor device determined as defective is loaded; A first test site which loads the semiconductor device from the material loading unit and performs a test process using a characteristic test signal applied from a first automatic test apparatus, and then loads the semiconductor device into the defective product loading unit if it is determined that the semiconductor device is defective; A buffer for temporarily loading a device on the peninsula determined as good at the first test site for loading into a subsequent test process; And a second test which loads the semiconductor device in the buffer and performs a test process using the characteristic test signal applied from the second automatic test apparatus, and if the defective product is loaded into the defective loading unit, and if the defective product is loaded into the defective loading unit site; Handler having multiple test structures of the device on the peninsula, characterized in that it comprises a.

※ Note: The disclosure is based on the initial application.