KR970018542A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents
Capacitor Manufacturing Method of Semiconductor Device Download PDFInfo
- Publication number
- KR970018542A KR970018542A KR1019950032962A KR19950032962A KR970018542A KR 970018542 A KR970018542 A KR 970018542A KR 1019950032962 A KR1019950032962 A KR 1019950032962A KR 19950032962 A KR19950032962 A KR 19950032962A KR 970018542 A KR970018542 A KR 970018542A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor substrate
- polysilicon layer
- forming
- insulating film
- doped
- Prior art date
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- Semiconductor Integrated Circuits (AREA)
Abstract
반도체장치의 캐패시터 제조 방법이 개시되어 있다. 본 발명은 반도체 기판 상에 절연막을 형성하는 단계; 상기 절연막을 패터닝하여 상기 반도체기판의 소정영역이 노출되도록 절연막 패턴을 형성하는 단계; 상기 절연막 패턴이 형성된 반도체기판 전면에 도우핑된 폴리실리콘막을 형성하는 단계; 상기 도우핑된 폴리실리콘막을 패터닝하여 상기 반도체기판의 소정영역을 덮는 축적전극을 형성하는 단계; 상기 축적전극의 표면에 HSG 폴리실리콘층을 형성하는 단계; 상기 HSG 폴리실리콘층을 도우핑시키는 단계; 및 상기 도우핑된 HSG 폴리실리콘층이 형성된 반도체기판 전면에 유전막 및 플레이트 전극을 차례로 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 캐패시터 제조방법을 제공한다.A method of manufacturing a capacitor of a semiconductor device is disclosed. The present invention includes forming an insulating film on a semiconductor substrate; Patterning the insulating film to form an insulating film pattern to expose a predetermined region of the semiconductor substrate; Forming a doped polysilicon film on an entire surface of the semiconductor substrate on which the insulating film pattern is formed; Patterning the doped polysilicon layer to form an accumulation electrode covering a predetermined region of the semiconductor substrate; Forming an HSG polysilicon layer on a surface of the storage electrode; Doping the HSG polysilicon layer; And sequentially forming a dielectric film and a plate electrode on a front surface of the semiconductor substrate on which the doped HSG polysilicon layer is formed.
본 발명에 의하면, HSG 폴리실리콘층을 형성한 후 이를 도우핑시킴으로써, 균일한 불순물농도를 가지면서 표면적이 큰 축적전극을 형성할 수 있어 캐패시터의 신뢰성 및 정전용량을 크게 개선시킬 수 있다.According to the present invention, by forming and then doping the HSG polysilicon layer, it is possible to form a storage electrode having a large surface area while having a uniform impurity concentration, thereby greatly improving the reliability and capacitance of the capacitor.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제4도는 본 발명에 의한 반도체 장치의 캐패시터 제조 방법을 설명하기 위한 단면도들이다.4 is a cross-sectional view illustrating a method of manufacturing a capacitor of a semiconductor device according to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950032962A KR970018542A (en) | 1995-09-29 | 1995-09-29 | Capacitor Manufacturing Method of Semiconductor Device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950032962A KR970018542A (en) | 1995-09-29 | 1995-09-29 | Capacitor Manufacturing Method of Semiconductor Device |
Publications (1)
Publication Number | Publication Date |
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KR970018542A true KR970018542A (en) | 1997-04-30 |
Family
ID=66615476
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950032962A KR970018542A (en) | 1995-09-29 | 1995-09-29 | Capacitor Manufacturing Method of Semiconductor Device |
Country Status (1)
Country | Link |
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KR (1) | KR970018542A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100338848B1 (en) * | 1998-02-03 | 2002-05-30 | 가네꼬 히사시 | Fabrication method of semiconductor device with hsg configuration |
-
1995
- 1995-09-29 KR KR1019950032962A patent/KR970018542A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100338848B1 (en) * | 1998-02-03 | 2002-05-30 | 가네꼬 히사시 | Fabrication method of semiconductor device with hsg configuration |
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