KR970018369A - LOCOS-Trench Combination Device Isolation Method - Google Patents
LOCOS-Trench Combination Device Isolation Method Download PDFInfo
- Publication number
- KR970018369A KR970018369A KR1019950031000A KR19950031000A KR970018369A KR 970018369 A KR970018369 A KR 970018369A KR 1019950031000 A KR1019950031000 A KR 1019950031000A KR 19950031000 A KR19950031000 A KR 19950031000A KR 970018369 A KR970018369 A KR 970018369A
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- KR
- South Korea
- Prior art keywords
- trench
- oxide film
- semiconductor substrate
- field oxide
- filling
- Prior art date
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- Element Separation (AREA)
Abstract
본 발명은 LOCOS와 트렌치를 조합한 반도체 장치의 소자분리 방법에 대해 기재되어 있다. 이는, 반도체기판 상에 패드산화막 및 질화막을 차례로 적층하는 공정, 비활성영역의 질화막 및 패드산화막을 식각하는 공정, 비활성영역에 필드산화막을 형성하는 공정, 필드산화막 에지부분의 반도체기판의 노출될 때까지 필드산화막을 식각하는 공정, 노출된 반도체기판을 식각함으로써 필드산화막 양측의 반도체 기판에 트렌치를 형성하는 공정, 트렌치를 절연물질로 매립하는 공정 및 적층된 막들을 제거하는 공정을 포함하여 이루어진다. 따라서, 종래의 LOCOS-트렌치 조합형의 소자분리 방법에 비해 공정을 단순화할 수 있으며, 사진식각 기술의 한계를 넘어 매우 좁은 폭의 트렌치도 형성할 수 있다.The present invention describes a device isolation method of a semiconductor device combining a LOCOS and a trench. This involves laminating a pad oxide film and a nitride film on a semiconductor substrate in sequence, etching a nitride film and a pad oxide film in an inactive region, forming a field oxide film in an inactive region, and exposing the semiconductor substrate at the edge portion of the field oxide film. Etching the field oxide film; forming a trench in the semiconductor substrate on both sides of the field oxide film by etching the exposed semiconductor substrate; embedding the trench with an insulating material; and removing the stacked films. Therefore, the process can be simplified compared to the conventional LOCOS- trench combination device isolation method, and it is possible to form a very narrow trench beyond the limitation of the photolithography technique.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2A도 내지 제 2G도는 본 발명의 제1 실시예에 따른 로코스(LOCOS) - 트렌치 조합형 소자분리 방법을 설명하기 위한 단면도들이다.2A to 2G are cross-sectional views illustrating a LOCOS-trench combination device isolation method according to a first embodiment of the present invention.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950031000A KR970018369A (en) | 1995-09-21 | 1995-09-21 | LOCOS-Trench Combination Device Isolation Method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950031000A KR970018369A (en) | 1995-09-21 | 1995-09-21 | LOCOS-Trench Combination Device Isolation Method |
Publications (1)
Publication Number | Publication Date |
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KR970018369A true KR970018369A (en) | 1997-04-30 |
Family
ID=66615798
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950031000A KR970018369A (en) | 1995-09-21 | 1995-09-21 | LOCOS-Trench Combination Device Isolation Method |
Country Status (1)
Country | Link |
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KR (1) | KR970018369A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100480625B1 (en) * | 2002-10-24 | 2005-03-31 | 삼성전자주식회사 | Method for forming trench isolation and semiconductor device comprising the same |
-
1995
- 1995-09-21 KR KR1019950031000A patent/KR970018369A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100480625B1 (en) * | 2002-10-24 | 2005-03-31 | 삼성전자주식회사 | Method for forming trench isolation and semiconductor device comprising the same |
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