KR970018356A - Device Separation Method of Semiconductor Device - Google Patents
Device Separation Method of Semiconductor Device Download PDFInfo
- Publication number
- KR970018356A KR970018356A KR1019950029287A KR19950029287A KR970018356A KR 970018356 A KR970018356 A KR 970018356A KR 1019950029287 A KR1019950029287 A KR 1019950029287A KR 19950029287 A KR19950029287 A KR 19950029287A KR 970018356 A KR970018356 A KR 970018356A
- Authority
- KR
- South Korea
- Prior art keywords
- trench
- etch stop
- stop layer
- insulating material
- forming
- Prior art date
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Abstract
트렌치를 이용한 반도체장치의 소자분리 방법에 대해 기재되어 있다.A device isolation method of a semiconductor device using a trench is described.
이는; 반도체 기판 상에 패드산화막 및 식각방지막 및 식각방지막을 차례로 적층하는 단계, 비활성영역의 상기 패드산화막 및 식각방지막을 식각하는 단계, 식각방지막을 마스크로하여 반도체 기판에 트렌치를 형성하는 단계, 트렌치의 내측벽에 스페이서를 형성하는 단계, 트렌치의 바닥을 산화시키는 단계 트렌치 내측벽의 스페이서를 제거하는 단계, 트렌치를 절연물질로 매립하는 단계 및 식각방지막의 표면이 드러날 때까지 상기 절연물질을 에치백하는 단계를 포함한다.this is; Stacking a pad oxide film, an etch stop layer and an etch stop layer on a semiconductor substrate in sequence, etching the pad oxide layer and an etch stop layer in an inactive region, forming a trench in the semiconductor substrate using the etch stop layer as a mask, and forming a trench in the trench Forming spacers in the sidewalls, oxidizing the bottom of the trench, removing spacers in the trench inner walls, embedding the trenches with insulating material and etching back the insulating material until the surface of the etch stop layer is revealed It includes.
따라서, 트렌치의 매립이 용이하고, 펀치쓰루 및 디슁현상의 발생을 억제할 수 있다.Therefore, the trench is easily buried and the occurrence of punch through and dip phenomenon can be suppressed.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1A도 내지 제1E도는 본 발명의 일 실시예에 의한 반도체장치의 소자분리방법을 설명하기 위한 단면도들이다.1A to 1E are cross-sectional views illustrating a device isolation method of a semiconductor device in accordance with an embodiment of the present invention.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950029287A KR970018356A (en) | 1995-09-07 | 1995-09-07 | Device Separation Method of Semiconductor Device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950029287A KR970018356A (en) | 1995-09-07 | 1995-09-07 | Device Separation Method of Semiconductor Device |
Publications (1)
Publication Number | Publication Date |
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KR970018356A true KR970018356A (en) | 1997-04-30 |
Family
ID=66596759
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019950029287A KR970018356A (en) | 1995-09-07 | 1995-09-07 | Device Separation Method of Semiconductor Device |
Country Status (1)
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KR (1) | KR970018356A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100414024B1 (en) * | 2001-05-09 | 2004-01-07 | 아남반도체 주식회사 | Method for forming a isolation layer of trench type |
KR100444315B1 (en) * | 1997-06-28 | 2004-11-09 | 주식회사 하이닉스반도체 | Method for manufacturing isolation layer with improved uniformity with active region of semiconductor device |
-
1995
- 1995-09-07 KR KR1019950029287A patent/KR970018356A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100444315B1 (en) * | 1997-06-28 | 2004-11-09 | 주식회사 하이닉스반도체 | Method for manufacturing isolation layer with improved uniformity with active region of semiconductor device |
KR100414024B1 (en) * | 2001-05-09 | 2004-01-07 | 아남반도체 주식회사 | Method for forming a isolation layer of trench type |
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