KR980006052A - Device Separation Method of Semiconductor Device - Google Patents

Device Separation Method of Semiconductor Device Download PDF

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Publication number
KR980006052A
KR980006052A KR1019960023982A KR19960023982A KR980006052A KR 980006052 A KR980006052 A KR 980006052A KR 1019960023982 A KR1019960023982 A KR 1019960023982A KR 19960023982 A KR19960023982 A KR 19960023982A KR 980006052 A KR980006052 A KR 980006052A
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KR
South Korea
Prior art keywords
film
photoresist pattern
trench
nitride film
oxide film
Prior art date
Application number
KR1019960023982A
Other languages
Korean (ko)
Inventor
박규찬
이덕형
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960023982A priority Critical patent/KR980006052A/en
Publication of KR980006052A publication Critical patent/KR980006052A/en

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Abstract

본 발명은 반도체장치의 소자분리 방법에 관해 개시한다. 본 발명에 의한 소자분리방법은 트랜치를 한정하는 스페이서를 인 시튜(in-situ)공정으로 폴리머를 사용하여 형성하고 트랜치에 절연물질을 채우기 전에 제거한다. 따라서 본 발명에 의한 소자분리 방법은 그 형성공정이 쉽고 포토레지스트와 함께 제거하므로 제거 공정도 매우 간단하다. 더욱이, 소자분리용 필드산화막을 구성하는 물질이 동일하므로 식각을 이용해서 그 형태를 쉽게 조절할 수 있다.The present invention discloses a device isolation method of a semiconductor device. In the device isolation method according to the present invention, a spacer defining a trench is formed using a polymer in an in-situ process and removed before filling the trench with an insulating material. Therefore, the device isolation method according to the present invention is very easy to form and removed together with the photoresist, so the removal process is also very simple. Furthermore, since the material constituting the field oxide film for device isolation is the same, the shape can be easily adjusted using etching.

Description

반도체장치의 소자분리 방법Device Separation Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제7도 내지 12도는 본 발명의 실시예에 의한 반도체장치의 소자분리 방법을 설명하기 위해 단계별로 나타낸 도면들이다.7 to 12 are diagrams showing step by step for explaining a device isolation method of a semiconductor device according to an embodiment of the present invention.

Claims (6)

반도체기판 상에 패드산화막 및 질화막을 순차적으로 형성하는 단계; 상기 질화막의 일부 영역을 한정하는 포토레지스트 패턴을 형성하는 단계; 상기 포토레지스트 패턴을 마스크로하여 상기 질화막 및 패드산화막을 식각하여 반도체기판의 계면을 노출시키는 단계; 상기 포토레지스트 패턴과 질화막 및 패드산화막 패턴의 측면에 폴리머스페이스를 형성하는 단계; 상기 포토레지스트 패턴과 폴리머 스페이서를 제거하는 단계; 상기 트랜치를 채우는 절연막을 상기 질화막 전면에 형성하는 단계; 상기 절연막의 전면을 상기 질화막의 계면 노출될 때까지 평탄화하는 단계; 상기 질화막 및 패드산화막을 제거하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 소자분리 방법.Sequentially forming a pad oxide film and a nitride film on the semiconductor substrate; Forming a photoresist pattern defining a portion of the nitride film; Etching the nitride film and the pad oxide film using the photoresist pattern as a mask to expose an interface of the semiconductor substrate; Forming a polymer space on side surfaces of the photoresist pattern, the nitride layer, and the pad oxide layer pattern; Removing the photoresist pattern and the polymer spacer; Forming an insulating film filling the trench on the entire surface of the nitride film; Planarizing the entire surface of the insulating film until the interface of the nitride film is exposed; And removing the nitride film and the pad oxide film. 제1항에 있어서, 상기 폴리머 스페이서는 유기가스(Organic gas)로 형성하는 것을 특징으로 하는 반도체장치의 소자분리 방법.The method of claim 1, wherein the polymer spacer is formed of an organic gas. 제2항에 있어서, 상기 유기가스로는 CHF3를 사용하는 것을 특징으로 하는 반도체장치의 소자분리 방법.3. The method of claim 2, wherein CHF 3 is used as the organic gas. 제1항에 있어서, 상기 트랜치를 형성한 후 또는 상기 포토레지스트 패턴과 폴리머 스페이서를 제거한 후 상기 트랜치 내벽에 이온주입을 실시하는 것을 특징으로 하는 반도체장치의 소자분리 방법.The method of claim 1, wherein ion implantation is performed on the inner wall of the trench after the trench is formed or after the photoresist pattern and the polymer spacer are removed. 제1항에 있어서, 상기 절연막은 산화막(SiO2), USG 또는 고밀도 플라즈마에 의한 산화막중 선택된 어느 하나로 형성하는 것을 특징으로 하는 반도체장치의 소자분리 방법.The method of claim 1, wherein the insulating film is formed of any one selected from an oxide film (SiO 2 ), an USG, or an oxide film formed by a high density plasma. 제1항에 있어서, 상기 폴리머 스페이서는 인 시튜(in-situ)공정으로 형성하는 것을 특징으로 하는 반도체장치의 소자분리 방법.The method of claim 1, wherein the polymer spacer is formed by an in-situ process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960023982A 1996-06-26 1996-06-26 Device Separation Method of Semiconductor Device KR980006052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960023982A KR980006052A (en) 1996-06-26 1996-06-26 Device Separation Method of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960023982A KR980006052A (en) 1996-06-26 1996-06-26 Device Separation Method of Semiconductor Device

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KR980006052A true KR980006052A (en) 1998-03-30

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KR1019960023982A KR980006052A (en) 1996-06-26 1996-06-26 Device Separation Method of Semiconductor Device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100419026B1 (en) * 1996-12-31 2004-05-22 주식회사 하이닉스반도체 Isolation method of semiconductor device
KR100831671B1 (en) * 2001-12-15 2008-05-22 주식회사 하이닉스반도체 Method for forming isolation of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100419026B1 (en) * 1996-12-31 2004-05-22 주식회사 하이닉스반도체 Isolation method of semiconductor device
KR100831671B1 (en) * 2001-12-15 2008-05-22 주식회사 하이닉스반도체 Method for forming isolation of semiconductor device

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