KR970016983A - Global bus matching device using buffer - Google Patents

Global bus matching device using buffer Download PDF

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Publication number
KR970016983A
KR970016983A KR1019950030864A KR19950030864A KR970016983A KR 970016983 A KR970016983 A KR 970016983A KR 1019950030864 A KR1019950030864 A KR 1019950030864A KR 19950030864 A KR19950030864 A KR 19950030864A KR 970016983 A KR970016983 A KR 970016983A
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KR
South Korea
Prior art keywords
global bus
buffer memory
parallel
matching device
global
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KR1019950030864A
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Korean (ko)
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KR0154482B1 (en
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김창일
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유기범
대우통신 주식회사
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Priority to KR1019950030864A priority Critical patent/KR0154482B1/en
Publication of KR970016983A publication Critical patent/KR970016983A/en
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Publication of KR0154482B1 publication Critical patent/KR0154482B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Bus Control (AREA)

Abstract

본 그로벌버스 정합장치는 주제어장치와 보조제어장치간에 그로벌버스 통신방식을 사용하는 장치에 있어서 주제어장치 또는 보조제어장치로부터 발생되는 메세지를 저장할 수 있는 버퍼를 이용하여 주제어장치와 그로벌버스간의 정합을 제어하기 위한 것으로서, 본 장치는 제1병직렬변환기로부터 발생된 메세지를 저장하는 버퍼메모리; 제1병직렬변화기로부터 전송된 데이타를 버퍼메모리에 저장하고, 그로벌버스의 상태를 체크하여 자신의 사용순서가 되면 버퍼메모리에 저장되어 있는 데이타를 읽는 그로벌버스 제어기; 그로벌 버스와 그로벌 버스제어기간의 데이타 송수신이 가능하도록 처리하기 위한 송수신 처리부를 포함하도록 구성된다.This global bus matching device uses the global bus communication method between the main control device and the auxiliary control device and uses the buffer to store messages generated from the main control device or the auxiliary control device. An apparatus for controlling matching, the apparatus comprising: a buffer memory for storing a message generated from a first parallel-serial converter; A global bus controller for storing the data transmitted from the first parallel series changer in the buffer memory, checking the state of the global bus, and reading the data stored in the buffer memory when its order of use is reached; And a transmission / reception processing unit for processing data transmission and reception in the global bus and the global bus control period.

Description

버퍼를 이용한 그로벌버스 정합장치Global bus matching device using buffer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 그로벌버스 정합장치를 구비한 장치의 블럭도.2 is a block diagram of a device having a global bus matching device according to the present invention.

Claims (3)

주제어장치와 보조제어장치 사이의 그로벌버스 통신방식을 사용하는 장치에어 상기 주제어장치의 프로세서(201)에서 발생되는 메세지를 직렬형태의 HDLC 포맷으로 전환하는 제1병직렬변환기(102)와 그로벌버스(105)간의 정합장치에 있어서, 상기 제1병직렬변화기(102)로부터 발생된 메세지를 저장하는 버퍼메모리(205);상기 제1병직렬전환기(102)로부터 전송된 데이타를 상기버퍼메모리9205)에 저장하고, 상기 그로벌버스의 상태를 체크하여 자신의 사용순서가 되면 상기 버퍼메모리(205)에 저장되어 있는 데이타를 읽는 그로벌버스 제어기(202); 상기 그로벌 버스(105)와 상기 그로벌 버스제어기(202)간의 데이타 송수신이 가능하도록 처리하기 위한 송수신처리부(104)를 포함함을 특징으로 하는 버퍼를 이용한 그로벌버스 정합장치.A device using a global bus communication method between the main control unit and the auxiliary control unit. The first parallel serial converter 102 and the global converting message generated by the processor 201 of the main control unit into the HDLC format in serial form. A matching device between buses (105), comprising: a buffer memory (205) for storing a message generated from the first parallel serial converter (102); data transmitted from the first parallel serial converter (102); A global bus controller 202 which checks the state of the global bus and reads the data stored in the buffer memory 205 when its order of use is reached; And a transmission / reception processing unit (104) for processing data transmission and reception between the global bus (105) and the global bus controller (202). 제1항에 있어서, 상기 그로벌버스 정합장치는, 상기 버퍼메모리(205)로 데이타 저장히, 상기 그로벌버스제어기(202)로부터 전송되는 데이타를 병렬변환하여 상기 버퍼메모리(205)로 전송하기 위한 직병렬변환기(203), 및 상기 버퍼메모리(205)로부터 데이타를 읽어올 때, 상기 버퍼메모리(205)로부터 전송되는 데이타를 직렬형태의 HDLC 포맷으로 변환하여 상기 그로벌버스 제어기(202)로 전송하기 위한 제2병직렬변환기(204)를 더 포함함을 특징으로 하는 버퍼를 이용한 그로벌버스 정합장치.The global bus matching device of claim 1, wherein the global bus matching device stores data in the buffer memory 205 and converts the data transmitted from the global bus controller 202 in parallel to the buffer memory 205. When reading data from the serial-to-parallel converter 203 and the buffer memory 205, the data transmitted from the buffer memory 205 is converted into a serial HDLC format to the global bus controller 202. And a second parallel-serial converter (204) for transmitting. 제1항에 있어서, 상기 그로벌버스 제어기(202)는 상기 프로세서(201)에서 상기 버퍼메모리(205)에 저장하고자 하는 메세지 내용이 상기 버퍼메모리(205)의 용량보다 크면 상기 프로세서(201)로 쓰기중지요청 인터럽트를 발생함을 특징으로 하는 버퍼를 이용한 그로벌버스 정합장치.The processor of claim 1, wherein the global bus controller 202 transmits the message contents to be stored in the buffer memory 205 in the processor 201 to the processor 201 if the message content is larger than the capacity of the buffer memory 205. A global bus matching device using a buffer characterized by generating a write request interrupt. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950030864A 1995-09-20 1995-09-20 Global bus interface apparatus using buffer KR0154482B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950030864A KR0154482B1 (en) 1995-09-20 1995-09-20 Global bus interface apparatus using buffer

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Application Number Priority Date Filing Date Title
KR1019950030864A KR0154482B1 (en) 1995-09-20 1995-09-20 Global bus interface apparatus using buffer

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KR970016983A true KR970016983A (en) 1997-04-28
KR0154482B1 KR0154482B1 (en) 1998-11-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113219943A (en) * 2021-04-24 2021-08-06 浙江大学 Fault diagnosis method without mathematical modeling of underwater robot

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113219943A (en) * 2021-04-24 2021-08-06 浙江大学 Fault diagnosis method without mathematical modeling of underwater robot

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