KR970013190A - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
- Publication number
- KR970013190A KR970013190A KR1019950024980A KR19950024980A KR970013190A KR 970013190 A KR970013190 A KR 970013190A KR 1019950024980 A KR1019950024980 A KR 1019950024980A KR 19950024980 A KR19950024980 A KR 19950024980A KR 970013190 A KR970013190 A KR 970013190A
- Authority
- KR
- South Korea
- Prior art keywords
- insulating film
- forming
- film pattern
- region
- semiconductor device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
Abstract
본 발명은 반도체 소자 제조방법에 관한 것으로, 활성영역과 소자격리영역이 정의된 반도체 기판 상의 소자 격리영역에 절연막 패턴을 형성하는 공정과; 상기 절연막 패턴을 포함한 기판에 산소 이온주입 후 상기 절연막 패턴을 제거하는 공정과; 열처리를 통하여 산소 이온주입영역에 격리막을 형성하는 공정 및; 활성영역에 트랜지스터를 형성하는 공정을 구비하여 소자를 완료하므로써, 1) 공정 단순화를 기할 수 있을 뿐 아니라 이로 인해 공정단가를 낮출 수 있게 되어 벌크 웨이퍼에 비해 가격면에서 차이가 커 양산공정에 적용하지 못했던 SOI 웨이퍼를 양산공정에 유리하게 적용할 수 있게 된다.The present invention relates to a method for manufacturing a semiconductor device, comprising: forming an insulating film pattern in an isolation region of a semiconductor substrate on which active regions and isolation regions are defined; Removing the insulating film pattern after implanting oxygen ions into the substrate including the insulating film pattern; Forming a separator in the oxygen ion implantation region through heat treatment; By completing the device by forming a transistor in the active region, 1) the process can be simplified, and the process cost can be lowered. Unsuccessful SOI wafers can be advantageously applied to mass production processes.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2(가)도 내지 제2(사)도는 본 발명에 따른 모스 전계효과트랜지스터의 제조공정을 도시한 공정수순도2 (a) to 2 (g) are process flowcharts showing the manufacturing process of the MOS field effect transistor according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950024980A KR0167253B1 (en) | 1995-08-14 | 1995-08-14 | Manufacture of a semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950024980A KR0167253B1 (en) | 1995-08-14 | 1995-08-14 | Manufacture of a semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970013190A true KR970013190A (en) | 1997-03-29 |
KR0167253B1 KR0167253B1 (en) | 1999-02-01 |
Family
ID=19423451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950024980A KR0167253B1 (en) | 1995-08-14 | 1995-08-14 | Manufacture of a semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0167253B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100685885B1 (en) * | 2005-10-28 | 2007-02-26 | 동부일렉트로닉스 주식회사 | Method for fabricating isolation region of semiconductor device |
-
1995
- 1995-08-14 KR KR1019950024980A patent/KR0167253B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100685885B1 (en) * | 2005-10-28 | 2007-02-26 | 동부일렉트로닉스 주식회사 | Method for fabricating isolation region of semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR0167253B1 (en) | 1999-02-01 |
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