KR970005725B1 - Method of manufacturing a dram - Google Patents

Method of manufacturing a dram Download PDF

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Publication number
KR970005725B1
KR970005725B1 KR91012949A KR910012949A KR970005725B1 KR 970005725 B1 KR970005725 B1 KR 970005725B1 KR 91012949 A KR91012949 A KR 91012949A KR 910012949 A KR910012949 A KR 910012949A KR 970005725 B1 KR970005725 B1 KR 970005725B1
Authority
KR
South Korea
Prior art keywords
forming
conductive layer
capacitor
layer
dram
Prior art date
Application number
KR91012949A
Other languages
Korean (ko)
Other versions
KR930003397A (en
Inventor
Yong-Hee Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to KR91012949A priority Critical patent/KR970005725B1/en
Publication of KR930003397A publication Critical patent/KR930003397A/en
Application granted granted Critical
Publication of KR970005725B1 publication Critical patent/KR970005725B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A method for fabricating a capacitor for DRAM is disclosed. The method for fabricating a capacitor for DRAM comprises the steps of: a) forming a transistor having an active region, a souce/drain and a gate electrode; b) forming a first insulating layer(1) on an exposed portion of the insulating layer; c) forming a first conductive layer(2) for burying the exposed portion; d) forming and patterning a second insulating layer93) to expose the surface of the conductive layer(2); e) depositing a second conductive layer(4) having a trench; f) filling the trench and removing the second conductive layer(4); g) forming a dielectric layer(6) of the surface of charge storage electrode; and g) forming a third conductive layer(7) of capacitor plate electrode on the dielectric layer(6). Thereby, the surface area of capacitor is increased, so that the storage capacity is increased and a manufacturing cost is greatly reduced.
KR91012949A 1991-07-26 1991-07-26 Method of manufacturing a dram KR970005725B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR91012949A KR970005725B1 (en) 1991-07-26 1991-07-26 Method of manufacturing a dram

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR91012949A KR970005725B1 (en) 1991-07-26 1991-07-26 Method of manufacturing a dram

Publications (2)

Publication Number Publication Date
KR930003397A KR930003397A (en) 1993-02-24
KR970005725B1 true KR970005725B1 (en) 1997-04-19

Family

ID=19317891

Family Applications (1)

Application Number Title Priority Date Filing Date
KR91012949A KR970005725B1 (en) 1991-07-26 1991-07-26 Method of manufacturing a dram

Country Status (1)

Country Link
KR (1) KR970005725B1 (en)

Also Published As

Publication number Publication date
KR930003397A (en) 1993-02-24

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