KR970004644A - Clock Generator Synchronized to Vertical Sync Signal - Google Patents
Clock Generator Synchronized to Vertical Sync Signal Download PDFInfo
- Publication number
- KR970004644A KR970004644A KR1019950017925A KR19950017925A KR970004644A KR 970004644 A KR970004644 A KR 970004644A KR 1019950017925 A KR1019950017925 A KR 1019950017925A KR 19950017925 A KR19950017925 A KR 19950017925A KR 970004644 A KR970004644 A KR 970004644A
- Authority
- KR
- South Korea
- Prior art keywords
- vertical sync
- phase
- clock generator
- signal
- synchronized
- Prior art date
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- Synchronizing For Television (AREA)
Abstract
본 발명은 수직 동기 신호에 강제 동기된 클럭 발생 장치에 간한 것으로서, 입력된 복합 영상 신호로부터 수직 동기 신호를 분리해내는 동기 분리부(10)와 상기 동기 분리부(10)에서 분리된 수직 동기 신호에 동기된 클럭을 발생시키는 위상 동기 루프(20)로 구성되어 있고, 상기와 같이 구성된 본 발명은 각 수직 동기 신호의 주기마다 정해진 갯수의 클럭이 발생되므로 회로의 오동작을 방지할 수 있다는데 그 이점이 있다.The present invention relates to a clock generator forcibly synchronized with a vertical synchronization signal, and includes a synchronization separator 10 separating a vertical synchronization signal from an input composite video signal and a vertical synchronization signal separated from the synchronization separator 10. It is composed of a phase-locked loop 20 for generating a clock synchronized with the above, and the present invention configured as described above can prevent a malfunction of the circuit because a predetermined number of clocks are generated for each period of the vertical synchronization signal. have.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도의 (가)는 수평 귀선 소거 기간을 나타낸 파형도, (나)는 수직 귀선 소거 기간을 나타낸 파형도.1A is a waveform diagram showing a horizontal blanking period, and (B) a waveform diagram showing a vertical blanking period.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950017925A KR970004644A (en) | 1995-06-28 | 1995-06-28 | Clock Generator Synchronized to Vertical Sync Signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950017925A KR970004644A (en) | 1995-06-28 | 1995-06-28 | Clock Generator Synchronized to Vertical Sync Signal |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970004644A true KR970004644A (en) | 1997-01-29 |
Family
ID=66524226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950017925A KR970004644A (en) | 1995-06-28 | 1995-06-28 | Clock Generator Synchronized to Vertical Sync Signal |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970004644A (en) |
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1995
- 1995-06-28 KR KR1019950017925A patent/KR970004644A/en not_active Application Discontinuation
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |