KR970002747A - Parallel Multicomputer System for Image Inspection with Annular Network - Google Patents

Parallel Multicomputer System for Image Inspection with Annular Network Download PDF

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KR970002747A
KR970002747A KR1019950015138A KR19950015138A KR970002747A KR 970002747 A KR970002747 A KR 970002747A KR 1019950015138 A KR1019950015138 A KR 1019950015138A KR 19950015138 A KR19950015138 A KR 19950015138A KR 970002747 A KR970002747 A KR 970002747A
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South Korea
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computer
processing node
image
host
image inspection
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KR1019950015138A
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Korean (ko)
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박규호
이충환
심광호
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심상철
한국과학기술원
심광호
건아기전 주식회사
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Priority to KR1019950015138A priority Critical patent/KR970002747A/en
Publication of KR970002747A publication Critical patent/KR970002747A/en

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Abstract

본 발명은 환형연결망을 지닌 화상검사용 병렬 다중컴퓨터시스템에 관한 것이다. 좀더 구체적으로, 본 발명은 복잡한 알고리즘 및 처리해야 할 다량의 데이타를 지닌 화상검사 알고리즘을 고속으로 수행할 수 있도록 환형연결망을 구비한 화상검사용 병렬 다중컴퓨터시스템에 관한 것이다. 본 발명의 병렬 다중컴퓨터시스템은 화상처리 알고리즘을 병렬로 수행할 수 있도록 형성된 복수개의 포르세싱 노드컴퓨터(20, 30, …, NO); 및, 호스트 컴퓨터의 역할을 수행하는 범용 퍼스널 컴퓨터(11), 카메라(1)의 신호선(14)으로 연결되어 영상의 입출력을 수행하는 영상입출력기(12) 및 프로세싱 노드컴퓨터(20, 30, …, NO)와 상호연결되어 연결모듈의 역할을 수행하는 호스트 FIFO버퍼(13)로 구성된 호스트부(10)를 포함하며, 호스트컴퓨터(11) 및 프로세싱 노드컴퓨터(20, 30, …, NO)는 호스트 FIFO버퍼(13) 및 양방향 통신채널(I/O1, I/O2, …, I/ON)에 의하여 이중연결된 환형연결망을 형성하는 것을 특징으로 한다. 본 발명에 따른 화상검사용 병렬 다중컴퓨터시스템은 종래의 순차적인 화상검사시스템에 비하여 빠른 처리속도를 지니며, 프로세싱 노드컴퓨터의 범용선으로 인하여 특정한 응용분야를 위한 종래의 회상검사장치에 비하여 뛰어난 범용성 및 학장성을 지니고 있다.The present invention relates to a parallel multi-computer system for image inspection with an annular connection network. More specifically, the present invention relates to a parallel multi-computer system for image inspection with an annular connection network capable of performing a complex algorithm and an image inspection algorithm having a large amount of data to be processed at high speed. The parallel multi-computer system of the present invention includes a plurality of processing node computers 20, 30, ..., NO formed to perform image processing algorithms in parallel; And a video input / output device 12 and a processing node computer 20, 30,... Which are connected to the general-purpose personal computer 11 serving as a host computer, the signal line 14 of the camera 1 to perform input / output of an image. And a host unit 10 composed of a host FIFO buffer 13 connected to each other and serving as a connection module, wherein the host computer 11 and the processing node computers 20, 30,. Characterized by forming a dual-connected annular network by the host FIFO buffer 13 and the bidirectional communication channels (I / O1, I / O2, ..., I / ON). The parallel multi-computer system for image inspection according to the present invention has a faster processing speed than the conventional sequential image inspection system, and has excellent generality compared to the conventional recall inspection apparatus for a specific application due to the general line of the processing node computer. And dean.

Description

환형연결망을 지닌 화상검사용 병렬 다중컴퓨터시스템Parallel Multicomputer System for Image Inspection with Annular Network

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 환형연결망을 지닌 병렬 다중컴퓨터시스템의 블록구성도이다. 제2도는 제1도의 병렬 다중컴퓨터시스템에서 각각의 프로세싱 노드컴퓨터를 연결하는 연결채널부의 블록구성도이다.1 is a block diagram of a parallel multi-computer system having an annular connection network according to the present invention. FIG. 2 is a block diagram of a connection channel unit connecting respective processing node computers in the parallel multicomputer system of FIG.

Claims (5)

화상처리 알고리즘을 병렬로 수행할 수 있도록 형성된 복수개의 포로세싱 노드컴퓨터(20, 30, …, NO); 및, 호스트 컴퓨터의 역할을 수행하는 범용 퍼스널 컴퓨터(11), 카메라(1)와 신호선(14)으로 연결되어 영상의 입출력이 수행하는 영상입출력기(12) 및 전기한 프로세싱 노드컴퓨터(20, 30, …, NO)와 상호연결되어 연결모듈의 역할을 수행하는 호스트 FIFO버퍼(13)로 구성된 호스트부(10)를 포함하며, 전기한 호스트컴퓨터(11) 및 프로세싱 노드컴퓨터(20, 30, …, NO)는 전기한 호스트 FIFO버퍼(13) 및 양방향 통신채널(I/O1, I/O2, …, I/ON)에 의하여 이중연결된 환형연결망을 형성하는 것을 특징으로 하는 화상검사용 병렬 다중컴퓨터시스템.A plurality of processing node computers 20, 30, ..., NO formed to perform image processing algorithms in parallel; And a general-purpose personal computer 11 serving as a host computer, an image input / output unit 12 connected to a camera 1 and a signal line 14 to perform image input / output, and the processing node computers 20 and 30 described above. And a host unit 10 composed of a host FIFO buffer 13 interconnected with NO, and serving as a connection module, wherein the host computer 11 and the processing node computers 20, 30,... , NO) is a parallel multi-computer for image inspection, characterized by forming an annular connection network double connected by the host FIFO buffer 13 and the bidirectional communication channels I / O1, I / O2, ..., I / ON. system. 제1항에 있어서, 프로세싱 노드컴퓨터(20, 30, …, NO)는 상용의 마이크로프로세서와 메모리 및 다른 프로세싱 노드컴퓨터와의 상호연결을 위한 FIFO 양방향 통신채널(I/O1, I/O2, …, I/ON)로 구성된 것을 특징으로 하는 화상검사용 병렬 다중컴퓨터시스템.2. A processing node computer (20, 30, ..., NO) according to claim 1, wherein the processing node computer (20, 30, ..., NO) is a FIFO bidirectional communication channel (I / O1, I / O2,... , I / ON) parallel multi-computer system for image inspection. 제1항에 있어서, 영상입출력기(12)는 입출력되는 영상데이타를 복수개의 프로세싱 노드컴퓨터(20, 30, …, NO)와 주고 받을 수 있도록 영상읽기채널(16) 및 영상쓰기채널(17)을 구비하는 것을 특징으로 하는 화상검사용 병렬 다중컴퓨터시스템.The image reading and outputting channel 16 and the image writing channel 17 of claim 1, wherein the image input / output unit 12 transmits and receives image data input and output to and from a plurality of processing node computers 20, 30, ..., NO. Parallel multi-computer system for image inspection, characterized in that it comprises a. 제1항에 있어서, 프로세싱 노드컴퓨터(20, 30, …, NO) 상에는 전후단의 노드컴퓨터로 송신을 수행하기 위한 FIFO버퍼(21, 22)와 환형연결망 상의 전단의 노드컴퓨터와 후단의 노드컴퓨터로부터의 수신을 수행하기 위한 수신채널용 커넥터(23, 24)가 구성된 것을 특징으로 하는 화상검사용 병렬 다중컴퓨터시스템.2. The node computer of the preceding stage and the node computer on the annular connection network with the FIFO buffers 21 and 22 for performing transmission to the node computers at the front and rear ends on the processing node computers 20, 30, ..., NO. And a receiving channel connector (23, 24) configured to perform reception from the parallel multi-computer system for image inspection. 제1항에 있어서, 프로세싱 노드컴퓨터(20, 30, …, NO)에는 I/O 동작을 위한 데이타버스(I/O)가 구비되며, 전기한 데이타버스(I/O)에는 전후단의 노드컴퓨터로의 송신 및 수신을 수행하기 위한 데이타버스(24, 25', 26, 26', 27, 28)가 구성된 것을 특징으로 하는 화상검사용 병렬 다중컴퓨터시스템.The processing node computer (20, 30, ..., NO) is provided with a data bus (I / O) for the I / O operation, the data bus (I / O) is a node of the front and rear ends And a data bus (24, 25 ', 26, 26', 27, 28) for performing transmission and reception to a computer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950015138A 1995-06-09 1995-06-09 Parallel Multicomputer System for Image Inspection with Annular Network KR970002747A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100249251B1 (en) * 1996-01-30 2000-03-15 가네꼬 히사시 Logic circuit optimization apparatus and its method
KR101504108B1 (en) * 2014-01-16 2015-03-19 삼성테크윈 주식회사 Communication systmem and device-control system for improving processing speed using input/output port

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100249251B1 (en) * 1996-01-30 2000-03-15 가네꼬 히사시 Logic circuit optimization apparatus and its method
KR101504108B1 (en) * 2014-01-16 2015-03-19 삼성테크윈 주식회사 Communication systmem and device-control system for improving processing speed using input/output port

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