KR960702014A - 기판내의 서브마이크론 비아 충전 방법(Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits) - Google Patents

기판내의 서브마이크론 비아 충전 방법(Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits)

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Publication number
KR960702014A
KR960702014A KR1019950704442A KR19950704442A KR960702014A KR 960702014 A KR960702014 A KR 960702014A KR 1019950704442 A KR1019950704442 A KR 1019950704442A KR 19950704442 A KR19950704442 A KR 19950704442A KR 960702014 A KR960702014 A KR 960702014A
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conductor
substrate
temperature
vias
metal
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KR1019950704442A
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KR100308467B1 (ko
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헨델 루디
레빈스테인 히맨
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투그룰 야사르
머티리얼즈 리서치 코포레이션
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/046—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/18—Metallic material, boron or silicon on other inorganic substrates
    • C23C14/185—Metallic material, boron or silicon on other inorganic substrates by cathodic sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3492—Variation of parameters during sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/54—Controlling or regulating the coating process
    • C23C14/541—Heating or cooling of the substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

서브 마이크론 비아(12 내지 14)는 실리콘 또는 실리콘 산화물과 같은 기판(11)상에 알루미늄(15)과 같은 도체의 스퍼터 침착에 의해 충전된다. 알루미늄 필름(15)은 제1의 저온에서 침착되고 그후에 상기 온도는 증가된다. 금속 도체(15)에 대한 기판(11)의 열적 팽창의 상이한 계수로 인해 도체가 비아(12 내지14)내로 팽창되게 한다. 유효한 두께(1+)를 유지하고 제1의 온도로부터 제2의 온도로의 온도증가를 제어하므로, 4까지의 종횡비를 가진 서브마이크론 비아를 유효하게 신뢰가능하게 충전한다. 본 발명은 20℃까지의 리-엔트런트 각도를 가진 비아를 충전하는데 특히 유용하다.

Description

기판내의 서브마이크론 비아 충전 방법(Method for p1anarization of submicron vias and the manufacture of semiconductor integrated circuits)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제15도는 다수의 비아를 가진 집적회로의 전반적인 개략도.
제16도는 라인 16-16을 따라 취해진 제15도의 단면도.

Claims (11)

  1. 기판이 금속도체보다 더 낮은 열적 팽창 계수를 갖게, 제1의 온도에서 상기 기판상에 상기 금속 도체의 층을 침착시키는 단계와; 제1의 온도로부터 제2의 온도로의 온도 증가에 의해 발생된 열적 압력과 상기 도체와 상기 기판의 상대적인 열적 팽창의 계수가 상기 도체를 팽창시켜 비아를 균일하게 충전하도록 침착된 도체의 필름이 유효하게 두껍게, 상기 기판과 상기 침착된 도체를 상기 제2의 온도로 가열하는 단계를 포함하는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  2. 제1항에 있어서, 상기 비아는 약 0.8에서 약 0.1까지의 마이크론의 직경을 갖는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  3. 제2항에 있어서, 상기 비아는 약 1에서 약 4까지의 종형비를 갖는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  4. 제2항에 있어서, 상기 비아는 상기 기판의 평면에 수직한 라인으로부터 측정된 약 0°에서 약 20°까지 의리-엔트런트 프로필을 구비하는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  5. 제4항에 있어서, 상기 비아는 5°내지 10°의 리-엔트런트 프로필을 구비하는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  6. 제1항에 있어서, 상기 금슥 도체는 알루미늄, A-Si, A-Cu, Al-Si-Cu 및, A-Ti로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  7. 제1항에 있어서, 상기 기판은 실리콘, 브론 및 실리카가 도핑된 인, 석영, TEOS, 스핀-온(spin-on)유리, Si3Ni4로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  8. 제1항에 있어서, 리-엔트런트 프로필은 장벽층을 침착시키는 스퍼터에 의해 상기 금속 도체를 침착시키기에 앞서 설정되는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  9. 제8항에 있어서, 상기 장벽층은 TiN, ZrN 및, RuO로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  10. 제1항에 있어서, 부가의 금속은 상기 도체가 가열될시에 상기 침착된 금속상에 스퍼터되는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
  11. 제l항에 있어서, 상기 제2의 온도는 1 내지 10분 동안 유지되어 상기 도체에 대한 압력 방출을 제공하는 것을 특징으로 하는 기판내의 서브마이크론 비아(via) 충전 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950704442A 1993-04-13 1994-03-25 기판내의서브마이크론비아충전방법 KR100308467B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US047,265 1993-04-13
US047265 1993-04-13
US08/047,265 US5360524A (en) 1993-04-13 1993-04-13 Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits
PCT/US1994/003286 WO1994024330A1 (en) 1993-04-13 1994-03-25 Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits

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KR960702014A true KR960702014A (ko) 1996-03-28
KR100308467B1 KR100308467B1 (ko) 2001-11-30

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US (1) US5360524A (ko)
EP (1) EP0694086B1 (ko)
JP (1) JP3400454B2 (ko)
KR (1) KR100308467B1 (ko)
AU (1) AU6525294A (ko)
CA (1) CA2159648A1 (ko)
DE (1) DE69428113T2 (ko)
TW (1) TW272305B (ko)
WO (1) WO1994024330A1 (ko)

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JP3400454B2 (ja) 2003-04-28
DE69428113T2 (de) 2002-01-24
DE69428113D1 (de) 2001-10-04
US5360524A (en) 1994-11-01
CA2159648A1 (en) 1994-10-27
TW272305B (ko) 1996-03-11
JPH08509101A (ja) 1996-09-24
KR100308467B1 (ko) 2001-11-30
EP0694086A1 (en) 1996-01-31
EP0694086A4 (en) 1998-03-04
AU6525294A (en) 1994-11-08
WO1994024330A1 (en) 1994-10-27
EP0694086B1 (en) 2001-08-29

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