KR960043087A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

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Publication number
KR960043087A
KR960043087A KR1019950012071A KR19950012071A KR960043087A KR 960043087 A KR960043087 A KR 960043087A KR 1019950012071 A KR1019950012071 A KR 1019950012071A KR 19950012071 A KR19950012071 A KR 19950012071A KR 960043087 A KR960043087 A KR 960043087A
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KR
South Korea
Prior art keywords
film
oxide film
forming
buried layer
buffer
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Application number
KR1019950012071A
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Korean (ko)
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KR0152951B1 (en
Inventor
전표만
Original Assignee
문정환
Lg 반도체주식회사
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Application filed by 문정환, Lg 반도체주식회사 filed Critical 문정환
Priority to KR1019950012071A priority Critical patent/KR0152951B1/en
Publication of KR960043087A publication Critical patent/KR960043087A/en
Application granted granted Critical
Publication of KR0152951B1 publication Critical patent/KR0152951B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자 제조방법에 관한 것으로, 반도체 기판 상부에 산화막을 형성하는 공정과; 상기 산화막 상부 및 기판 하부에 완충막을 형성하는 공정과; 매몰층 형성 부위의 완충막 및 산화막을 식각처리하는 공정과; 상기 완충막과 매몰층이 형성될 부분에 불순물을 주입한 후 확산시키는 공정 및; 상기 산화막과 완충막을 제거하고, 매몰층 및 반도체 기판위에 에피층을 형성하는 공정을 거쳐 소자 제조를 완료하므로써, 1) 에피층 형성 후 매몰층 패턴의 뭉게짐(washout)을 줄일 수 있어 이후 얼라인(align) 공정시 정확성을 기할 수 있고, 2) Sb2O3적층시 실리콘과 산화막 게면에서 발생되는 Si덩어리를 제거할 수 있으며, 3) 질화막을 반도체 기판 전면(상·하부)에 증착한 후 매몰층을 형성하여 Sb2O3적층 및 확산공정시 실리콘에 함유된 불순물 이온이 질화막과 산화막 필름의 스트레스 작용에 의해 이동되는 게터링(gettering) 효과를 얻을 수 있게 된다.The present invention relates to a method for manufacturing a semiconductor device, comprising: forming an oxide film on a semiconductor substrate; Forming a buffer film on the oxide film and a substrate; Etching the buffer film and the oxide film at the buried layer forming site; Injecting impurities into a portion where the buffer film and the buried layer are to be formed and then diffusing them; By removing the oxide film and the buffer film and forming the epi layer on the buried layer and the semiconductor substrate, the device is completed. 1) After the epi layer is formed, the washout of the buried layer pattern can be reduced, and then alignment is performed. (align) accuracy can be achieved during the alignment process, 2) Si lumps generated from silicon and oxide film surface can be removed during Sb 2 O 3 lamination, and 3) nitride film is deposited on the entire surface (top and bottom) of semiconductor substrate. By forming a buried layer, it is possible to obtain a gettering effect in which impurity ions contained in silicon are transferred by the stress action of the nitride film and the oxide film during the Sb 2 O 3 lamination and diffusion processes.

Description

반도체 소자 제조방법Semiconductor device manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2(가)도 내지 제2(사)도는 본 발명에 따른 반도체 소자 제조공정을 도시한 공정수순도.2 (a) to 2 (g) are process flowcharts showing a semiconductor device manufacturing process according to the present invention.

Claims (5)

반도체 기판 상부에 산화막을 형성하는 공정과; 상기 산화막 상부 및 기판 하부에 완충막을 형성하는 공정과; 매몰층 형성 부위의 완충막 및 산화막을 식각처리하는 공정과; 상기 완충막과 매몰층이 형성될 부분에 불순물을 주입한 후 확산시키는 공정 및; 상기 산화막과 완충막을 제거하고, 매몰층 및 반도체 기판 위에 에피층을 형성하는 공정을 구비하여 이루어짐을 특징으로 하는 반도체 소자 제조방법.Forming an oxide film on the semiconductor substrate; Forming a buffer film on the oxide film and a substrate; Etching the buffer film and the oxide film at the buried layer forming site; Injecting impurities into a portion where the buffer film and the buried layer are to be formed and then diffusing them; Removing the oxide film and the buffer film, and forming an epitaxial layer on the buried layer and the semiconductor substrate. 제1항에 있어서, 상기 완충막은 질화막으로 형성하는 것을 특징으로 하는 반도체 소자 제조방법.The method of claim 1, wherein the buffer film is formed of a nitride film. 제2항에 있어서, 상기 완충막은 Si3N4로 형성하는 것을 특징으로 하는 반도체 소자 제조방법.The method of claim 2, wherein the buffer layer is formed of Si 3 N 4 . 제1항에 있어서, 상기 완충막은 1000Å의 두께로 형성하는 것을 특징으로 하는 반도체 소자 제조방법.The method of claim 1, wherein the buffer film is formed to a thickness of 1000 kHz. 제1항에 있어서, 상기 완충막은 플라즈마를 이용한 건식식각법으로 식각처리하는 것을 특징으로 하는 반도체 소자 제조방법.The method of claim 1, wherein the buffer layer is etched by a dry etching method using plasma. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950012071A 1995-05-16 1995-05-16 Manufacturing method of semiconductor device KR0152951B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950012071A KR0152951B1 (en) 1995-05-16 1995-05-16 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950012071A KR0152951B1 (en) 1995-05-16 1995-05-16 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
KR960043087A true KR960043087A (en) 1996-12-23
KR0152951B1 KR0152951B1 (en) 1998-12-01

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950012071A KR0152951B1 (en) 1995-05-16 1995-05-16 Manufacturing method of semiconductor device

Country Status (1)

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Publication number Publication date
KR0152951B1 (en) 1998-12-01

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