KR960042974A - - Google Patents
Info
- Publication number
- KR960042974A KR960042974A KR19960018076A KR19960018076A KR960042974A KR 960042974 A KR960042974 A KR 960042974A KR 19960018076 A KR19960018076 A KR 19960018076A KR 19960018076 A KR19960018076 A KR 19960018076A KR 960042974 A KR960042974 A KR 960042974A
- Authority
- KR
- South Korea
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/047—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein
- H10W20/049—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by introducing additional elements therein by diffusing alloying elements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US44749095A | 1995-05-23 | 1995-05-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR960042974A true KR960042974A (https=) | 1996-12-21 |
Family
ID=23776586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR19960018076A Ceased KR960042974A (https=) | 1995-05-23 | 1996-05-22 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6150252A (https=) |
| EP (1) | EP0793268A3 (https=) |
| JP (1) | JPH09223741A (https=) |
| KR (1) | KR960042974A (https=) |
| TW (1) | TW302513B (https=) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09115866A (ja) * | 1995-10-17 | 1997-05-02 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPH09275142A (ja) * | 1995-12-12 | 1997-10-21 | Texas Instr Inc <Ti> | 半導体の空隙を低温低圧で充填を行う処理方法 |
| US6054379A (en) * | 1998-02-11 | 2000-04-25 | Applied Materials, Inc. | Method of depositing a low k dielectric with organo silane |
| US6143655A (en) | 1998-02-25 | 2000-11-07 | Micron Technology, Inc. | Methods and structures for silver interconnections in integrated circuits |
| US6121126A (en) * | 1998-02-25 | 2000-09-19 | Micron Technologies, Inc. | Methods and structures for metal interconnections in integrated circuits |
| US6492694B2 (en) | 1998-02-27 | 2002-12-10 | Micron Technology, Inc. | Highly conductive composite polysilicon gate for CMOS integrated circuits |
| US6815303B2 (en) * | 1998-04-29 | 2004-11-09 | Micron Technology, Inc. | Bipolar transistors with low-resistance emitter contacts |
| US6627539B1 (en) | 1998-05-29 | 2003-09-30 | Newport Fab, Llc | Method of forming dual-damascene interconnect structures employing low-k dielectric materials |
| US5948467A (en) * | 1998-07-24 | 1999-09-07 | Sharp Laboratories Of America, Inc. | Enhanced CVD copper adhesion by two-step deposition process |
| JP2000106397A (ja) * | 1998-07-31 | 2000-04-11 | Sony Corp | 半導体装置における配線構造及びその形成方法 |
| TW439204B (en) * | 1998-09-18 | 2001-06-07 | Ibm | Improved-reliability damascene interconnects and process of manufacture |
| US6383915B1 (en) * | 1999-02-03 | 2002-05-07 | Applied Materials, Inc. | Tailoring of a wetting/barrier layer to reduce electromigration in an aluminum interconnect |
| US6486063B2 (en) * | 2000-03-02 | 2002-11-26 | Tokyo Electron Limited | Semiconductor device manufacturing method for a copper connection |
| US6723634B1 (en) * | 2002-03-14 | 2004-04-20 | Advanced Micro Devices, Inc. | Method of forming interconnects with improved barrier layer adhesion |
| US20050006770A1 (en) * | 2003-07-08 | 2005-01-13 | Valeriy Sukharev | Copper-low-K dual damascene interconnect with improved reliability |
| US7118801B2 (en) * | 2003-11-10 | 2006-10-10 | Gore Enterprise Holdings, Inc. | Aerogel/PTFE composite insulating material |
| US7101787B1 (en) | 2004-04-09 | 2006-09-05 | National Semiconductor Corporation | System and method for minimizing increases in via resistance by applying a nitrogen plasma after a titanium liner deposition |
| US7482266B2 (en) * | 2007-02-15 | 2009-01-27 | United Microelectronics Corp. | Method of forming composite opening and method of dual damascene process using the same |
| US7772123B2 (en) * | 2008-06-06 | 2010-08-10 | Infineon Technologies Ag | Through substrate via semiconductor components |
| US8525343B2 (en) * | 2010-09-28 | 2013-09-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device with through-silicon via (TSV) and method of forming the same |
| US8901701B2 (en) * | 2011-02-10 | 2014-12-02 | Chia-Sheng Lin | Chip package and fabrication method thereof |
| US9685366B1 (en) | 2016-04-21 | 2017-06-20 | International Business Machines Corporation | Forming chamferless vias using thermally decomposable porefiller |
| US10998221B2 (en) * | 2017-07-14 | 2021-05-04 | Micron Technology, Inc. | Semiconductor constructions having fluorocarbon material |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0199216A (ja) * | 1987-10-13 | 1989-04-18 | Fujitsu Ltd | 半導体装置の製造方法 |
| US5008216A (en) * | 1988-10-03 | 1991-04-16 | International Business Machines Corporation | Process for improved contact stud structure for semiconductor devices |
| JP2697796B2 (ja) * | 1988-11-14 | 1998-01-14 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
| DE69023382T2 (de) * | 1989-04-17 | 1996-06-20 | Ibm | Laminierungsverfahren zum Überdecken der Seitenwände einer Höhlung in einem Substrat sowie zur Füllung dieser Höhlung. |
| US5073518A (en) * | 1989-11-27 | 1991-12-17 | Micron Technology, Inc. | Process to mechanically and plastically deform solid ductile metal to fill contacts of conductive channels with ductile metal and process for dry polishing excess metal from a semiconductor wafer |
| US5108951A (en) * | 1990-11-05 | 1992-04-28 | Sgs-Thomson Microelectronics, Inc. | Method for forming a metal contact |
| US5011793A (en) * | 1990-06-19 | 1991-04-30 | Nihon Shinku Gijutsu Kabushiki Kaisha | Vacuum deposition using pressurized reflow process |
| CA2061119C (en) * | 1991-04-19 | 1998-02-03 | Pei-Ing P. Lee | Method of depositing conductors in high aspect ratio apertures |
| GB9414145D0 (en) * | 1994-07-13 | 1994-08-31 | Electrotech Ltd | Forming a layer |
| DE69233222T2 (de) * | 1991-05-28 | 2004-08-26 | Trikon Technologies Ltd., Thornbury | Verfahren zum Füllen eines Hohlraumes in einem Substrat |
| TW520072U (en) * | 1991-07-08 | 2003-02-01 | Samsung Electronics Co Ltd | A semiconductor device having a multi-layer metal contact |
| JP2718842B2 (ja) * | 1991-07-17 | 1998-02-25 | シャープ株式会社 | 半導体集積回路用配線金属膜の製造方法 |
| EP0526889B1 (en) * | 1991-08-06 | 1997-05-07 | Nec Corporation | Method of depositing a metal or passivation fabric with high adhesion on an insulated semiconductor substrate |
| US5371042A (en) * | 1992-06-16 | 1994-12-06 | Applied Materials, Inc. | Method of filling contacts in semiconductor devices |
| US5288665A (en) * | 1992-08-12 | 1994-02-22 | Applied Materials, Inc. | Process for forming low resistance aluminum plug in via electrically connected to overlying patterned metal layer for integrated circuit structures |
| GB9224260D0 (en) * | 1992-11-19 | 1993-01-06 | Electrotech Ltd | Forming a layer |
| US5356836A (en) * | 1993-08-19 | 1994-10-18 | Industrial Technology Research Institute | Aluminum plug process |
| US5523259A (en) * | 1994-12-05 | 1996-06-04 | At&T Corp. | Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer |
| KR960026249A (ko) * | 1994-12-12 | 1996-07-22 | 윌리엄 이. 힐러 | 고압, 저온 반도체 갭 충진 프로세스 |
-
1996
- 1996-05-22 KR KR19960018076A patent/KR960042974A/ko not_active Ceased
- 1996-05-22 EP EP96108163A patent/EP0793268A3/en not_active Withdrawn
- 1996-05-23 JP JP8128523A patent/JPH09223741A/ja active Pending
- 1996-05-29 US US08/654,810 patent/US6150252A/en not_active Expired - Lifetime
- 1996-07-10 TW TW085108325A patent/TW302513B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP0793268A2 (en) | 1997-09-03 |
| US6150252A (en) | 2000-11-21 |
| EP0793268A3 (en) | 1999-03-03 |
| TW302513B (https=) | 1997-04-11 |
| JPH09223741A (ja) | 1997-08-26 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
|
| A201 | Request for examination | ||
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
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| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
St.27 status event code: N-2-6-B10-B15-exm-PE0601 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |
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| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |