KR960039627A - Input buffer of synchronous memory device - Google Patents
Input buffer of synchronous memory device Download PDFInfo
- Publication number
- KR960039627A KR960039627A KR1019950008098A KR19950008098A KR960039627A KR 960039627 A KR960039627 A KR 960039627A KR 1019950008098 A KR1019950008098 A KR 1019950008098A KR 19950008098 A KR19950008098 A KR 19950008098A KR 960039627 A KR960039627 A KR 960039627A
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- South Korea
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- gate input
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- memory device
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Abstract
본 발명은 지연부를 사용하지 않고도 입력측 클럭에 의한 신호(K-PULSE)의 폭에 관계없이 K-PULSE가 로우에서 하이가될 때만 유효한 데이타를 갖고 있으면 그 데이타가 어드레스 버퍼 내부의 래치회로에 저장되도록 함으로써 셋업 타임과 홀드 타입의 특성을 개선하는 동기식 메모리소자의 입력버퍼에 관한 것이다.In the present invention, regardless of the width of the signal (K-PULSE) by the input side clock without using a delay unit, if the data has valid data only when K-PULSE goes from low to high, the data is stored in the latch circuit inside the address buffer. The present invention relates to an input buffer of a synchronous memory device which improves the setup time and hold type characteristics.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제3도는 본 발명에 따른 어드레스 버퍼의 회로 구성도, 제4도는 제3도의 신호 파형도.3 is a circuit configuration diagram of an address buffer according to the present invention, and FIG. 4 is a signal waveform diagram of FIG.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950008098A KR960039627A (en) | 1995-04-07 | 1995-04-07 | Input buffer of synchronous memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950008098A KR960039627A (en) | 1995-04-07 | 1995-04-07 | Input buffer of synchronous memory device |
Publications (1)
Publication Number | Publication Date |
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KR960039627A true KR960039627A (en) | 1996-11-25 |
Family
ID=66553410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950008098A KR960039627A (en) | 1995-04-07 | 1995-04-07 | Input buffer of synchronous memory device |
Country Status (1)
Country | Link |
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KR (1) | KR960039627A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100474991B1 (en) * | 1997-07-29 | 2005-05-27 | 삼성전자주식회사 | Input buffer and input buffering method of semiconductor memory device |
-
1995
- 1995-04-07 KR KR1019950008098A patent/KR960039627A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100474991B1 (en) * | 1997-07-29 | 2005-05-27 | 삼성전자주식회사 | Input buffer and input buffering method of semiconductor memory device |
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E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |