KR960028716A - Fanol double-sided board and its double-sided method - Google Patents

Fanol double-sided board and its double-sided method Download PDF

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Publication number
KR960028716A
KR960028716A KR1019940037275A KR19940037275A KR960028716A KR 960028716 A KR960028716 A KR 960028716A KR 1019940037275 A KR1019940037275 A KR 1019940037275A KR 19940037275 A KR19940037275 A KR 19940037275A KR 960028716 A KR960028716 A KR 960028716A
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KR
South Korea
Prior art keywords
substrate
double
wire
jump
sided
Prior art date
Application number
KR1019940037275A
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Korean (ko)
Inventor
김구중
차영호
Original Assignee
이헌조
주식회사 엘지전자
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 이헌조, 주식회사 엘지전자 filed Critical 이헌조
Priority to KR1019940037275A priority Critical patent/KR960028716A/en
Publication of KR960028716A publication Critical patent/KR960028716A/en

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Abstract

본원 발명은 재질을 패놀로 하고 제조공장을 단순화하여 제품의 단가를 낮출 수 있는 패놀 양면기판 및 그 양면화 방법에 관한 것으로서, 상하면에 회로패턴이 인쇄된 기판과, 상기 기판상에 형성된 홀과, 상기 기판의 상하면인 동시에 상기 홀의 주위에 형성된 접속단자와, 상기 홀에 삽입되어 상하측을 연결하는 점프와이어와, 상기 접속단자와 점프와이어를 접속하는 용융솔더로 구성되어, 기판에 전자부품 및 점프와이어를 삽입하여 상기 점프와이어의 중앙부를 절단하는 제1과정과, 상기 기판의 하부에서 납땜을 수행하여 상기 점프와이어를 상면과 하면의 접속단자에 동시에 접속시키는 제2과정으로 이루어짐으로서 제조공정을 단순화하는 것을 특징으로 한다.The present invention relates to a panol double-sided substrate and a double-sided method that can reduce the unit cost of the product by using a panol material and simplifying the manufacturing plant, a substrate having a circuit pattern printed on the upper and lower surfaces, a hole formed on the substrate, A connection terminal formed on the upper and lower surfaces of the substrate and around the hole, a jump wire inserted into the hole to connect the upper and lower sides, and a molten solder connecting the connection terminal and the jump wire to the substrate. The first process of cutting the center portion of the jump wire by inserting a wire, and the second process of connecting the jump wire to the connection terminal of the upper and lower surfaces by soldering at the bottom of the substrate to simplify the manufacturing process Characterized in that.

Description

패놀 양면기판 및 그 양면화 방법Fanol double-sided board and its double-sided method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도는 본원 발명에 의한 양면기판의 단면도, 제5도(가)(나)는 본원 발명에 의한 점프와이어의 단면도, 제7도는 본원 발명에 의한 점프와이어 삽입장치의 구성 및 동작을 나타내는 도면, 제8도는 본원 발명에 의한 중심동선이 절단된 점프와이어를 사용한 경우의 양면기판 제조공정을 나타내는 도면Figure 4 is a cross-sectional view of the double-sided substrate according to the present invention, Figure 5 (a) (b) is a cross-sectional view of the jump wire according to the present invention, Figure 7 is a view showing the configuration and operation of the jump wire insertion apparatus according to the present invention, 8 is a view showing a double-sided substrate manufacturing process in the case of using a jump wire cut in the center copper line according to the present invention

Claims (5)

상하면에 회로패턴이 인쇄된 기판과, 상기 기판상에 형성된 홀과, 상기 기판의 상하면인 동시에 상기 홀의 주위에 형성된 접속단자와, 상기 홀에 삽입되어 상하측을 연결하는 점프와이어와, 상기 접속단자와 점프와이어를 접속하는 용융솔더로 구성된 것을 특징으로 하는 패놀 양면기판.A substrate having a circuit pattern printed on the upper and lower surfaces, a hole formed on the substrate, a connecting terminal formed around the hole at the same time as the upper and lower surfaces of the substrate, a jump wire inserted into the hole and connecting the upper and lower sides, and the connecting terminal And a molten solder for connecting jump wires with each other. 제1항에 있어서, 상기 점프와이어는 동선을 중심으로 하고, 상기 동선의 표면에 플럭스(FLUX)와 솔더(SOLDER)가 순차로 코팅된 것을 특징으로 하는 패놀 양면기판.The panol double-sided board of claim 1, wherein the jump wire is centered on a copper wire, and a surface of the copper wire is sequentially coated with flux and solder. 제2항에 있어서, 상기 중심이 되는 동선을 중앙이 절단되어 2개로 분리된 것을 특징으로 하는 패놀 양면기판.The panol double-sided board according to claim 2, wherein the copper wire serving as the center is divided into two by cutting the center thereof. 기판에 전자부품을 삽입하는 동시에 중심동선이 연결된 점프와이어를 삽입하여 상기 점프와이어의 중앙부를 절단하는 제1과정과, 상기 기판의 하부에서 납땜을 수행하여 상기 점프와어어를 상면과 하면의 접속단자에 동시에 접속시키는 제2과정으로 이루어진 것을 특징으로 하는 기판 양면화 방법.A first process of cutting the center of the jump wire by inserting a jump wire connected to a central copper wire while inserting an electronic component into a board, and soldering the lower part of the board to connect the jump wire to the upper and lower surfaces. And a second step of simultaneously connecting the same. 기판에 전자부품을 삽입하는 동시에 중심동선의 중앙부가 절단된 점프와이어를 삽입하는 제1과정과, 상기 기판의 하부에서 납땜을 수행하여 상기 점프와이어를 상면과 하면의 접속단자에 동시에 접속시키는 제2과정으로 이루어진 것을 특징으로 하는 기판 양면화 방법.A first process of inserting an electronic component into a substrate and inserting a jump wire cut at a center portion of a central copper wire; and a second process of soldering the lower portion of the substrate to connect the jump wire to the connection terminals of the upper and lower surfaces simultaneously A substrate double-sided method, characterized in that consisting of a process.
KR1019940037275A 1994-12-27 1994-12-27 Fanol double-sided board and its double-sided method KR960028716A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940037275A KR960028716A (en) 1994-12-27 1994-12-27 Fanol double-sided board and its double-sided method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940037275A KR960028716A (en) 1994-12-27 1994-12-27 Fanol double-sided board and its double-sided method

Publications (1)

Publication Number Publication Date
KR960028716A true KR960028716A (en) 1996-07-22

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KR1019940037275A KR960028716A (en) 1994-12-27 1994-12-27 Fanol double-sided board and its double-sided method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150111388A (en) * 2014-03-20 2015-10-06 주식회사 대유위니아 Circuit patterning of pcb

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150111388A (en) * 2014-03-20 2015-10-06 주식회사 대유위니아 Circuit patterning of pcb

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