JPS61115343A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS61115343A JPS61115343A JP23701984A JP23701984A JPS61115343A JP S61115343 A JPS61115343 A JP S61115343A JP 23701984 A JP23701984 A JP 23701984A JP 23701984 A JP23701984 A JP 23701984A JP S61115343 A JPS61115343 A JP S61115343A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- soldering
- solder
- copper foil
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
この発明は、プリント基板へ半田付けされる半導体集積
回路の接続用端子に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a connection terminal for a semiconductor integrated circuit that is soldered to a printed circuit board.
[従来の技術]
−・般に、半導体集積回路をプリント基板に半田付けに
する場合には、プリント基板に端子接続用の挿入孔を設
けるものめ、挿入孔を設けずに端子と基板の銅箔部とを
直接半田付けするものとがある。第4図は上記後者の場
合の接続方法を示すもので (1)は半導体集積回路の
端子、(2)はこの端子(1)が半田付けされるプリン
ト基板の銅箔部である。ところが最近では集積度の高密
化により端子の教示増えるに伴って端子間の間隔も狭く
なる傾向にある。しかしながら端子の幅を必要以上に狭
くすることは機械的強度の低下となる。そこで従来では
第4図に示すように端子間距離が狭(なるに伴って銅箔
部(2)の幅を狭くしていた。[Prior art] - Generally, when soldering a semiconductor integrated circuit to a printed circuit board, there are two methods: one is to provide an insertion hole for terminal connection on the printed circuit board, and the other is to solder the terminal and the copper of the board without providing an insertion hole. There is one in which the foil part is directly soldered. FIG. 4 shows the connection method in the latter case, where (1) is a terminal of a semiconductor integrated circuit, and (2) is a copper foil portion of a printed circuit board to which this terminal (1) is soldered. However, in recent years, as the degree of integration has become higher and the number of terminals has increased, the spacing between the terminals has also tended to become narrower. However, making the terminal width narrower than necessary reduces the mechanical strength. Therefore, in the past, as the distance between the terminals became narrower, the width of the copper foil portion (2) was narrowed as shown in FIG.
h記のような従来の端子接続では、fj4箔部(2)の
幅が狭くなっているので、端子(1)の側面部での銅箔
部(2)との半田付けは不安定となりゃすく、このため
品質低下が生じる等の問題点があった。In the conventional terminal connection as shown in item h, the width of the fj4 foil part (2) is narrow, so the soldering with the copper foil part (2) on the side surface of the terminal (1) may become unstable. Therefore, there were problems such as quality deterioration.
この発明は、かかる問題点を解決するためになされたも
ので、端子の機械的強度を低下させることなく、かつ銅
箔部と端子との半田付けを安定性よく確実に行なえるよ
うにした半導体集積回路を得ることを目的とする。This invention was made in order to solve these problems, and is a semiconductor device that enables stable and reliable soldering between a copper foil part and a terminal without reducing the mechanical strength of the terminal. The purpose is to obtain integrated circuits.
[問題点を解決するための手段]
この発明に係る半導体集積回路は、集積回路の端子の/
!@箔への半田付は部分の端子幅を狭くしたものである
。[Means for Solving the Problems] The semiconductor integrated circuit according to the present invention has the following advantages:
! @For soldering to foil, the width of the terminal is narrowed.
[作用]
この発明においては、端子の半田付は部分の端子幅を狭
くした4ので、半田付は端子部と銅箔部との半田付は面
積が広くなり、したがって端子の側面部での銅箔部との
半田付けが安定性よく強固に行なうことができる。[Function] In this invention, since the terminal width is narrowed in the soldering portion 4 of the terminal, the soldering area between the terminal portion and the copper foil portion is wide, and therefore, the soldering area of the terminal portion and the copper foil portion is wide. Soldering with the foil part can be performed stably and firmly.
[実施例]
第1図はこの発明の一実施例を示す平面図であり (1
)は半遮体集積回路の接続用の各端子、(2)はこの各
端子(1)が半田付けされるプリント基板の銅箔部であ
る。 (la)は上記端子(1)の半田付は部分であっ
て、端子(1)の幅より狭く形成しである。第2図は端
子(1)と銅箔部(2)とを正面より見た図で、 プリ
ント基板(3)の銅箔部(2)と端子(1)間にクリー
ム半田(4)を使用した例をポす。[Embodiment] FIG. 1 is a plan view showing an embodiment of the present invention.
) are each terminal for connection of the semi-shielding integrated circuit, and (2) is a copper foil portion of the printed circuit board to which each terminal (1) is soldered. (la) is the soldering portion of the terminal (1), which is formed narrower than the width of the terminal (1). Figure 2 is a front view of the terminal (1) and copper foil part (2), and cream solder (4) is used between the copper foil part (2) of the printed circuit board (3) and the terminal (1). I'll post an example.
上記のように構成し4ことにより、半田付は作業におい
て、クリーム半田(4)が溶融して端子(1)と銅箔部
(2)とが半田付けされるが、例えば第5図に示した従
来のように端子(1)と銅箔部(2)との幅が略同じ場
合は、クリーム半田(4)が端子(1)の側面に付きに
くいことが解る。ところがこの発明のように端子(1)
の半田付は部分(la)の幅を狭くすることにより、半
田(4)の溶融に伴なって半田付は部分(la)の側面
部に半田が容器に溶は込む。これにより端子(1)は半
田付は部分(1a)のみならずその他の端子側面部にも
半田が流れ込んで確実な半田付けが行なえる。With the above configuration 4, during soldering work, the cream solder (4) melts and the terminal (1) and the copper foil part (2) are soldered together, as shown in FIG. 5, for example. It can be seen that when the terminal (1) and the copper foil portion (2) have substantially the same width as in the conventional case, the cream solder (4) is difficult to adhere to the side surface of the terminal (1). However, as in this invention, terminal (1)
In soldering, by narrowing the width of the portion (la), as the solder (4) melts, the solder melts into the side surface of the portion (la) into the container. As a result, when soldering the terminal (1), the solder flows not only to the portion (1a) but also to the other side surfaces of the terminal, so that reliable soldering can be performed.
なお、第3図に示すように端子(1)の半田付は部分(
1b)を形成することにより、端子間距離がより狭くな
った場合、または一層半田付けを安定にする場合に好適
である。In addition, as shown in Figure 3, the soldering of the terminal (1) is done only partially (
1b) is suitable when the distance between terminals becomes narrower or when soldering becomes more stable.
(発明の効果]
この発明は以上説明したように、プリント基板銅箔への
集積回路の端子半田付は部分の幅を狭く、。、8よ、、
1イ。。0□1工、1
せることなく、銅箔部と端子との半田付けを安定性よく
、かつ確実に行なえ、品質の高い半田結合が可能となる
等の効果がある。(Effects of the Invention) As explained above, this invention reduces the width of the soldering part of the integrated circuit terminals to the copper foil of the printed circuit board.
1. . 0 □ 1 work, 1 It is possible to perform soldering between the copper foil part and the terminal in a stable and reliable manner without causing any damage, and there are effects such as enabling high-quality solder joints.
第1図はこの発明の一実施例をオ、す平面図、第2図は
端子先端部から見た半田付は前の拡大図、第3図は端子
の他の例の平面図、第4図および第5図は従来のものの
各々の平面図である。
(1):端子、
(la) :半田付は部分、
(2):銅箔部、
(3)ニブリント基板。
(4):クリーム半田、
なお、図中同一符号は同−又は相当部分を示。Fig. 1 is a plan view of one embodiment of the present invention, Fig. 2 is an enlarged view of the soldering seen from the tip of the terminal, Fig. 3 is a plan view of another example of the terminal, and Fig. 4 is a plan view of another example of the terminal. FIG. 5 is a plan view of each of the conventional devices. (1): terminal, (la): soldering part, (2): copper foil part, (3) niblint board. (4): Cream solder In addition, the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
とを半田付けにより接続するものにおいて、上記半導体
集積回路の端子の銅箔部への半田付け部分の端子幅を狭
くしたことを特徴とする半導体集積回路。A device for connecting a connecting terminal of a semiconductor integrated circuit and a copper foil portion of a printed circuit board by soldering, characterized in that the terminal width of the soldered portion of the terminal of the semiconductor integrated circuit to the copper foil portion is narrowed. Semiconductor integrated circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23701984A JPS61115343A (en) | 1984-11-09 | 1984-11-09 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23701984A JPS61115343A (en) | 1984-11-09 | 1984-11-09 | Semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61115343A true JPS61115343A (en) | 1986-06-02 |
Family
ID=17009180
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23701984A Pending JPS61115343A (en) | 1984-11-09 | 1984-11-09 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61115343A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02152243A (en) * | 1988-12-02 | 1990-06-12 | Rohm Co Ltd | Semiconductor device |
JPH02137051U (en) * | 1989-04-13 | 1990-11-15 | ||
WO2015141114A1 (en) * | 2014-03-19 | 2015-09-24 | パナソニックIpマネジメント株式会社 | Electronic component |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5279258A (en) * | 1975-12-25 | 1977-07-04 | Nippon Electric Co | Container for electronic circuit parts |
-
1984
- 1984-11-09 JP JP23701984A patent/JPS61115343A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5279258A (en) * | 1975-12-25 | 1977-07-04 | Nippon Electric Co | Container for electronic circuit parts |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02152243A (en) * | 1988-12-02 | 1990-06-12 | Rohm Co Ltd | Semiconductor device |
JPH02137051U (en) * | 1989-04-13 | 1990-11-15 | ||
WO2015141114A1 (en) * | 2014-03-19 | 2015-09-24 | パナソニックIpマネジメント株式会社 | Electronic component |
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