KR960026937A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

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Publication number
KR960026937A
KR960026937A KR1019940039483A KR19940039483A KR960026937A KR 960026937 A KR960026937 A KR 960026937A KR 1019940039483 A KR1019940039483 A KR 1019940039483A KR 19940039483 A KR19940039483 A KR 19940039483A KR 960026937 A KR960026937 A KR 960026937A
Authority
KR
South Korea
Prior art keywords
forming
semiconductor device
photoresist pattern
manufacturing
ion implantation
Prior art date
Application number
KR1019940039483A
Other languages
Korean (ko)
Inventor
황준
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940039483A priority Critical patent/KR960026937A/en
Publication of KR960026937A publication Critical patent/KR960026937A/en

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체 소자의 제조방법에 관한 것으로, 산화막 스페이서 없이 N+접합영역을 형성한 다음 LDD 이온주입영역 형성하므로써 제조공정을 간단히 할 수 있고 또한 공정결함을 제거할 수 있는 반도체 소자 제조방법이 개시된다.The present invention relates to a method for manufacturing a semiconductor device, and a semiconductor device manufacturing method which can simplify the manufacturing process and eliminate process defects by forming an N + junction region without an oxide film spacer and then forming an LDD ion implantation region. do.

Description

반도체 소자 제조방법Semiconductor device manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A내지 제1D도는 본 발명에 따른 반도체 소자 제조방법으로 설명하기 위한 단면도.1A to 1D are cross-sectional views for explaining the semiconductor device manufacturing method according to the present invention.

Claims (2)

반도체 소자 제조방법에 있어서, 실리콘 기판상에 게이트 산화막 및 폴리실리콘층을 순차적으로 형성하는 단계와, 상기 폴리실리콘층상부에 소정폭의 포토레지스트 패턴을 형성하는 단계와, 상기 포토레지스트 패턴을 이용한 폴리실리콘 식각공정으로 상기 포토레지스트 패턴의 하부에 언더컷을 형성하여, 이로 인하여 포토레지스트 패턴의 크기보다 작은 게이트 전극을 형성하는 단계와, 고농도 불순물 이온주입공정으로 접합영역을 형성하는 단계와, 상기 포토레지스트 패턴을 제거하고 저농도 불순물 이온주입공정으로 LDD 영역을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 제조방법.A method of manufacturing a semiconductor device, comprising: sequentially forming a gate oxide film and a polysilicon layer on a silicon substrate, forming a photoresist pattern having a predetermined width on the polysilicon layer, and using the photoresist pattern Forming an undercut under the photoresist pattern by a silicon etching process, thereby forming a gate electrode smaller than the size of the photoresist pattern, forming a junction region by a high concentration impurity ion implantation process, and Removing the pattern and forming an LDD region by a low concentration impurity ion implantation process. 제1항에 있어서, 상기 언더컷의 폭은 0.1~0.3㎛를 형성되는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the undercut has a width of about 0.1 μm to about 0.3 μm. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039483A 1994-12-30 1994-12-30 Semiconductor device manufacturing method KR960026937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940039483A KR960026937A (en) 1994-12-30 1994-12-30 Semiconductor device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940039483A KR960026937A (en) 1994-12-30 1994-12-30 Semiconductor device manufacturing method

Publications (1)

Publication Number Publication Date
KR960026937A true KR960026937A (en) 1996-07-22

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ID=66647818

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940039483A KR960026937A (en) 1994-12-30 1994-12-30 Semiconductor device manufacturing method

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KR (1) KR960026937A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100506878B1 (en) * 1997-12-29 2005-10-19 주식회사 하이닉스반도체 Manufacturing method of MOS field effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100506878B1 (en) * 1997-12-29 2005-10-19 주식회사 하이닉스반도체 Manufacturing method of MOS field effect transistor

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