KR910013590A - Manufacturing method of high voltage semiconductor device - Google Patents

Manufacturing method of high voltage semiconductor device Download PDF

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Publication number
KR910013590A
KR910013590A KR1019890019743A KR890019743A KR910013590A KR 910013590 A KR910013590 A KR 910013590A KR 1019890019743 A KR1019890019743 A KR 1019890019743A KR 890019743 A KR890019743 A KR 890019743A KR 910013590 A KR910013590 A KR 910013590A
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KR
South Korea
Prior art keywords
source
drain region
poly
silicon nitride
forming
Prior art date
Application number
KR1019890019743A
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Korean (ko)
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KR920009894B1 (en
Inventor
손해윤
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to KR1019890019743A priority Critical patent/KR920009894B1/en
Publication of KR910013590A publication Critical patent/KR910013590A/en
Application granted granted Critical
Publication of KR920009894B1 publication Critical patent/KR920009894B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음.No content.

Description

고압 반도체소자의 제조방법Manufacturing method of high voltage semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 고압 반도체소자의 제조공정도.1 is a manufacturing process diagram of the high-voltage semiconductor device of the present invention.

Claims (1)

저농도 불순물을 갖는 소오스/드레인 영역내에 고농도 불순물을 갖는 소오스/드레인영역이 형성된 이중확산 구조를 고압 반도체 소자에 있어서, 게이트 산화막(2) 및 필드 산화막(3)이 형성된 실리콘 기판(1)상에 폴리실리콘막(4) 및 제1질화실리콘막(5)을 순차적으로 증착시키는 공정과, 폴리콘택용 포토레지스터패턴(61)을 마스크로 하여 상기 제1질화실리콘막(5)을 드라이 에칭하고, 포토 레지스트, 패턴(62)를 마스크로 하여 폴리 콘택(42) 및 게이트 폴리(41)를 형성하는 공정과, 불순물의 이온주입을 실시하여 저농도 불순물을 갖는 소오스/드레인 영역(7)을 형성하는 공정과, 제2질화 실리콘막(8)을 도포한 후, 게이트 폴리(41) 및 폴리 콘택(42)의 측벽 및 상부에만 폴리 산화막이 형성되도록 그 주변부의 질화실리콘막(8)을 제거하는 공정과, 폴리산화막(9)을 형성하고, 이중 확산구조를 갖는 소오스/드레인 영역을 형성하기 위하여 저농도 불순물을 갖는 소오스/드레인 영역(7)내에 고농도 불순물을 갖는 소오스/드레인 영역(10)을 형성하는 공정과, PSG으로 된 층간 절연막(11)을 형성한 후, 금속으로 전극(12)을 형성하는 공정을 포함하는 것을 특징으로 하는 고압 반도체소자의 제조방법.A double diffusion structure in which a source / drain region having a high concentration impurity is formed in a source / drain region having a low concentration impurity has a polydiffusion structure on a silicon substrate 1 on which a gate oxide film 2 and a field oxide film 3 are formed. Sequentially depositing the silicon film 4 and the first silicon nitride film 5, and dry etching the first silicon nitride film 5 using the photoresist pattern 61 for poly contact as a mask Forming a poly contact 42 and a gate poly 41 using the resist and pattern 62 as a mask, and implanting impurities to form a source / drain region 7 having a low concentration of impurities; And after applying the second silicon nitride film 8, removing the silicon nitride film 8 at its periphery so that the poly oxide film is formed only on the sidewalls and the top of the gate poly 41 and the poly contact 42; Poly oxide film (9) And forming a source / drain region 10 having a high concentration impurity in the source / drain region 7 having a low concentration impurity so as to form a source / drain region having a double diffusion structure, and an interlayer insulating film made of PSG. And forming a electrode (12) from metal after forming (11). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890019743A 1989-12-27 1989-12-27 Manufacturing method of high-voltage semiconductor device KR920009894B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890019743A KR920009894B1 (en) 1989-12-27 1989-12-27 Manufacturing method of high-voltage semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890019743A KR920009894B1 (en) 1989-12-27 1989-12-27 Manufacturing method of high-voltage semiconductor device

Publications (2)

Publication Number Publication Date
KR910013590A true KR910013590A (en) 1991-08-08
KR920009894B1 KR920009894B1 (en) 1992-11-05

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ID=19293843

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890019743A KR920009894B1 (en) 1989-12-27 1989-12-27 Manufacturing method of high-voltage semiconductor device

Country Status (1)

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KR (1) KR920009894B1 (en)

Also Published As

Publication number Publication date
KR920009894B1 (en) 1992-11-05

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