KR960026861A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Capacitor Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR960026861A
KR960026861A KR1019940039071A KR19940039071A KR960026861A KR 960026861 A KR960026861 A KR 960026861A KR 1019940039071 A KR1019940039071 A KR 1019940039071A KR 19940039071 A KR19940039071 A KR 19940039071A KR 960026861 A KR960026861 A KR 960026861A
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KR
South Korea
Prior art keywords
conductive layer
forming
layer
insulating film
insulating layer
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Application number
KR1019940039071A
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Korean (ko)
Inventor
김석수
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940039071A priority Critical patent/KR960026861A/en
Publication of KR960026861A publication Critical patent/KR960026861A/en

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Abstract

본 발명은 반도체소자의 캐패시터 제조방법에 관한 것으로, 하부 절연층과 제1절연막을 형성하고 저장전극마스크를 이용하여 상기 제1도전층을 일정두께 식각한 다음, 상기 제1도전층 측벽에 제2절연막으로 스페이서를 형성하고 상기 제1도전층의 식각된 부분에만 감광막을 형성한 다음, 상기 스페이서를 선택성장시켜 선택적 성장 절연막을 형성하고, 상기 선택적 성장 절연막을 마스크로하고 상기 제1절연막을 식각장벽으로하여 상기 제1도전층을 일정두께 식각한 다음, 전체표면상부에 제2도전층을 형성하고 이를 이방성식각한 다음, 상기 선택적 성장 절연막과 제2절연막 그리고 제1절연막을 제거함으로써 표면적이 증가된 저장전극을 형성하고 후공정에서 반도체소자의 고집적화에 충분한 정전용량을 갖는 캐패시터를 형성하여 반도체소자의 고집적화를 가능하게 하고 이에따른 반도체소자의 신뢰성을 향상시키는 기술이다.The present invention relates to a method for manufacturing a capacitor of a semiconductor device, comprising forming a lower insulating layer and a first insulating layer, etching a predetermined thickness of the first conductive layer using a storage electrode mask, and then forming a second insulating layer on a sidewall of the first conductive layer A spacer is formed of an insulating film, and a photoresist is formed only on an etched portion of the first conductive layer. Then, the spacer is selectively grown to form a selective growth insulating film. The selective growth insulating film is used as a mask, and the first insulating film is an etch barrier. The first conductive layer is etched to a predetermined thickness, a second conductive layer is formed on the entire surface and anisotropically etched, and the surface area is increased by removing the selective growth insulating film, the second insulating film and the first insulating film. High density of semiconductor devices by forming storage electrodes and forming capacitors having capacitances sufficient for high integration of semiconductor devices in later processes It is a technology that enables the integration and improves the reliability of the semiconductor device.

Description

반도체소자의 캐패시터 제조방법Capacitor Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1F도는 본 발명의 실시예에 따른 반도체소자의 캐패시터 제조공정을 도시한 단면도.1A to 1F are sectional views showing a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

Claims (7)

반도체기판 상부에 하부절연층 및 제1절연막을 순차적으로 형성하는 공정과, 콘택마스크를 이용한 식각공정으로 콘택홀을 형성하는 공정과, 상기 반도체기판에 접속되는 제1도전층을 형성하는 공정과, 저장전극마스크를 이용하여 상기 제1도전층을 일정두께 식각하는 공정과, 상기 식각된 제1도전층 측벽에 제2절연막으로 스페이서를 형성하는 공정과, 상기 제1도전층의 식각된 부분에 감광막을 형성하는 공정과, 상기 제2절연막을 선택성장시켜 선택적 성장 절연막을 형성하는 공정과, 상기 감광막을 제거하는 공정과 상기 선택적 성장 절연막을 마스크로하여 상기 제1도전층을 일정두께 식각하는 공정과, 전체표면상부에 일정두께 제2도전층을 형성하는 공정과, 상기 제2도전층 스페이서를 형성하는 공정과, 상기 선택적 성장 절연막, 제2절연막 및 1절연막을 제거함으로써 표면적이 증가된 저장전극을 형성하는 반도체소자의 캐패시터 제조방법.Sequentially forming a lower insulating layer and a first insulating layer on the semiconductor substrate, forming a contact hole by an etching process using a contact mask, forming a first conductive layer connected to the semiconductor substrate, Etching a predetermined thickness of the first conductive layer using a storage electrode mask, forming a spacer as a second insulating layer on the etched sidewall of the first conductive layer, and a photoresist layer on the etched portion of the first conductive layer. Forming a selective growth insulating film by selectively growing the second insulating film; removing the photosensitive film; and etching a predetermined thickness of the first conductive layer using the selective growth insulating film as a mask; Forming a second conductive layer with a predetermined thickness over the entire surface, forming the second conductive layer spacer, the selective growth insulating film, the second insulating film, and one section. A method for manufacturing a capacitor of a semiconductor device to form a storage electrode having an increased surface area by removing the smoke. 제1항에 있어서, 상기 제1,2도전층은 단차피복비가 우수한 도전체로 형성되는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the first and second conductive layers are formed of a conductor having excellent step coverage ratio. 제1항에 있어서, 상기 저장전극마스크를 이용한 식각공정은 상기 제1절연막이 노출되지 않도록 실시되는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the etching process using the storage electrode mask is performed so that the first insulating layer is not exposed. 제1항에 있어서, 상기 감광막은 전체표면상부에 두껍게 형성하고 산소플라즈마를 이용한 식각공정으로 상기 제2절연막 스페이서가 노출되며 상기 제1도전층의 상부와 평탄하게 형성되는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The semiconductor device of claim 1, wherein the photoresist layer is thickly formed on an entire surface of the semiconductor device, and the second insulating layer spacer is exposed by an etching process using oxygen plasma and is formed flat on the upper portion of the first conductive layer. Capacitor Manufacturing Method. 제1항에 있어서, 상기 선택적 성장 도전층은 과도성장되어 상기 감광막과 제1도전층의 일부를 도포하도록 형성되는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the selective growth conductive layer is overgrown to form a portion of the photosensitive film and the first conductive layer. 제1항에 있어서, 상기 선택적 성장 절연막을 이용한 식각공정은 상기 제1절연막을 식각장벽으로 하여 상기 콘택홀이 노출되지 않도록 실시되는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the etching process using the selective growth insulating layer is performed so that the contact hole is not exposed by using the first insulating layer as an etch barrier. 제1항에 있어서, 상기 선택적 성장 절연막, 제2절연막 및 제1절연막 제거공정은 상기 제1,2도전층과의 식각선택비를 이용한 습식방법으로 실시되는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of claim 1, wherein the selective growth insulating layer, the second insulating layer, and the first insulating layer removing process are performed by a wet method using an etching selectivity with respect to the first and second conductive layers. . ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039071A 1994-12-29 1994-12-29 Capacitor Manufacturing Method of Semiconductor Device KR960026861A (en)

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KR1019940039071A KR960026861A (en) 1994-12-29 1994-12-29 Capacitor Manufacturing Method of Semiconductor Device

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KR1019940039071A KR960026861A (en) 1994-12-29 1994-12-29 Capacitor Manufacturing Method of Semiconductor Device

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KR960026861A true KR960026861A (en) 1996-07-22

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KR1019940039071A KR960026861A (en) 1994-12-29 1994-12-29 Capacitor Manufacturing Method of Semiconductor Device

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