KR960026127A - Recess Array Formation of Highly Integrated Semiconductor Devices - Google Patents
Recess Array Formation of Highly Integrated Semiconductor Devices Download PDFInfo
- Publication number
- KR960026127A KR960026127A KR1019940040757A KR19940040757A KR960026127A KR 960026127 A KR960026127 A KR 960026127A KR 1019940040757 A KR1019940040757 A KR 1019940040757A KR 19940040757 A KR19940040757 A KR 19940040757A KR 960026127 A KR960026127 A KR 960026127A
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- KR
- South Korea
- Prior art keywords
- recess array
- highly integrated
- integrated semiconductor
- oxide film
- semiconductor devices
- Prior art date
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Abstract
1. 청구 범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION
고집적 반도체 소자 제조 방법.Highly integrated semiconductor device manufacturing method.
2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention
반도체 기판의 리세스 어레이를 형성할 지역에 필드 산화막을 성장시킨 후 다시 식각하여 그 부분에 리세스 어레이를 형성하는 경우에, 공정이 복잡할 뿐만 아니라 필드 산화막을 매우 두껍게 성장시킨 다음 완전히 식각해내야 하기 때문에 웨이퍼 자체의 스택킹 폴트(Stacking Fault)에 매우 취약하고 1㎛ 이상의 깊이를 가진 리세스 어레이를 형성하기가 매우 어렵다는 문제점을 해결하고자 함.In the case where the field oxide film is grown in the region where the recess array of the semiconductor substrate is to be formed and then etched again to form the recess array in the portion, the process is not only complicated, but the field oxide film must be grown very thick and then completely etched. Therefore, it is very vulnerable to the stacking fault of the wafer itself, and it is very difficult to form a recess array having a depth of 1 μm or more.
3. 발명의 해결방법의 요지3. Summary of Solution to Invention
후속 공정에서 상대적을 낮은 토폴로지를 갖게 될 지역에 선택적 에피택셜 성장법으로 실리콘을 성장시켜 높여주므로써, 반도체 기판상에 깊고 완만한 경계면을 가진 리세스 어레이를 형성하게 됨.By growing and increasing silicon by selective epitaxial growth in areas that will have relatively low topologies in subsequent processes, a recess array with deep, smooth interfaces is formed on the semiconductor substrate.
4. 발명의 중요한 용도4. Important uses of the invention
고집적 반도체 소자, 특히 CMOSFET 제조에 이용됨.Used in manufacturing highly integrated semiconductor devices, especially CMOSFETs.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2A도 내지 제2C도는 본 발명의 반도체 소자의 리세스 어레이 형성 방법에 따른 제조 공정도.2A to 2C are manufacturing process diagrams according to a method of forming a recess array in a semiconductor device of the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940040757A KR960026127A (en) | 1994-12-30 | 1994-12-30 | Recess Array Formation of Highly Integrated Semiconductor Devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940040757A KR960026127A (en) | 1994-12-30 | 1994-12-30 | Recess Array Formation of Highly Integrated Semiconductor Devices |
Publications (1)
Publication Number | Publication Date |
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KR960026127A true KR960026127A (en) | 1996-07-22 |
Family
ID=66647532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019940040757A KR960026127A (en) | 1994-12-30 | 1994-12-30 | Recess Array Formation of Highly Integrated Semiconductor Devices |
Country Status (1)
Country | Link |
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KR (1) | KR960026127A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19980030446A (en) * | 1996-10-29 | 1998-07-25 | 김영환 | Semiconductor substrate and formation method thereof |
-
1994
- 1994-12-30 KR KR1019940040757A patent/KR960026127A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19980030446A (en) * | 1996-10-29 | 1998-07-25 | 김영환 | Semiconductor substrate and formation method thereof |
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