KR960023266A - Polysilicon layer formation method of semiconductor device - Google Patents

Polysilicon layer formation method of semiconductor device Download PDF

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Publication number
KR960023266A
KR960023266A KR1019940038579A KR19940038579A KR960023266A KR 960023266 A KR960023266 A KR 960023266A KR 1019940038579 A KR1019940038579 A KR 1019940038579A KR 19940038579 A KR19940038579 A KR 19940038579A KR 960023266 A KR960023266 A KR 960023266A
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KR
South Korea
Prior art keywords
amorphous silicon
polysilicon layer
semiconductor device
forming
silicon
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Application number
KR1019940038579A
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Korean (ko)
Other versions
KR0136996B1 (en
Inventor
박인옥
서광수
정영석
김의석
홍흥기
구영모
김세정
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to KR1019940038579A priority Critical patent/KR0136996B1/en
Publication of KR960023266A publication Critical patent/KR960023266A/en
Application granted granted Critical
Publication of KR0136996B1 publication Critical patent/KR0136996B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/48—Ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

본 발명은 반도체 소자의 폴리실리콘층 형성방법에 관한 것으로, 박막트랜지스터의 채널이 형성되는 폴리실리콘층을 형성함에 있어, 입계의 비정합원자 배열에 따른 댕글링본드의 존재로 인한 트랩 사이트를 감소시키기 위하여 비정질실리콘을 증착하기 전에 산소(O2) 또는 실리콘(Si) 이온을 주입시키므로써 비정질실리콘의 재결정화과정에서 핵생성률을 최소화시키며 상대적으로 입자의 성장속도를 증가시켜 입자의 조대화를 이룰 수 있도록 한 반도체 소자의 폴리실리콘층 형성방법에 관한 것이다.The present invention relates to a method for forming a polysilicon layer of a semiconductor device, and in forming a polysilicon layer in which a channel of a thin film transistor is formed, to reduce trap sites due to the presence of dangling bonds due to non-coherent atom arrangement of grain boundaries. By injecting oxygen (O 2 ) or silicon (Si) ions before depositing amorphous silicon, the nucleation rate can be minimized during the recrystallization of amorphous silicon and the grain growth rate can be relatively increased by increasing the particle growth rate. The present invention relates to a polysilicon layer forming method of a semiconductor device.

Description

반도체 소자의 폴리실리콘층 형성방법Polysilicon layer formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A 내지 제1C도는 본 발명에 따른 반도체 소자의 폴리실리콘층 형성방법을 설명하기 위한 소자의 단면도.1A to 1C are cross-sectional views of a device for explaining a method of forming a polysilicon layer of a semiconductor device according to the present invention.

Claims (4)

반도체 소자의 폴리실리콘층 형성방법에 있어서, 실리콘기판상에 형성된 산화막내에 잉여산소를 생성시키기 위하여 산소 또는 실리콘이온을 주입시키는 단계와, 상기 단계로부터 소정의 세정공정을 실시한 후 상기 실리콘기판을 저압화학기상증착반응로의 튜브로 로딩하고, SiH4가스를 열분해시켜 잉여산소가 존재하는 상기 산화막상부에 비정질실리콘층을 형성시키는 단계와, 상기 단계로부터 상기 튜브내부를 진공상태로 만들고 온도를 상승시킨 후 열처리하여 상기 비정질실리콘을 재결정화시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 폴리실리콘층 형성방법.A method for forming a polysilicon layer of a semiconductor device, comprising: injecting oxygen or silicon ions to generate excess oxygen in an oxide film formed on a silicon substrate, performing a predetermined cleaning process from the step, and then performing low pressure chemical Loading into a tube of a vapor deposition reactor and pyrolyzing SiH 4 gas to form an amorphous silicon layer on the oxide film in which excess oxygen is present; vacuuming the inside of the tube from the step and raising the temperature; And heat-treating the amorphous silicon to recrystallize the amorphous silicon. 제1항에 있어서, 상기 산소 또는 실리콘이온주입시 이온주입에너지는 상기 산화막의 두께에 따라 조절되는 것을 특징으로 하는 반도체 소자의 폴리실리콘층 형성방법.The method of claim 1, wherein the ion implantation energy of the oxygen or silicon ion is adjusted according to the thickness of the oxide layer. 제1항에 있어서, 상기 비정질실리콘층 형성시 증착온도는 500 내지 550℃인 것을 특징으로 하는 반도체 소자의 폴리실리콘층 형성방법.The method of claim 1, wherein the deposition temperature is 500 to 550 ° C. when forming the amorphous silicon layer. 제1항에 있어서, 상기 비정질실리콘층을 재결정화시키기 위한 열처리공정은 600℃ 이상에서 실시되는 것을 특징으로 하는 반도체 소자의 폴리실리콘층 형성방법.The method of claim 1, wherein the heat treatment step for recrystallizing the amorphous silicon layer is performed at 600 ° C. or higher. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940038579A 1994-12-29 1994-12-29 Method for making polysilicon layer KR0136996B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940038579A KR0136996B1 (en) 1994-12-29 1994-12-29 Method for making polysilicon layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940038579A KR0136996B1 (en) 1994-12-29 1994-12-29 Method for making polysilicon layer

Publications (2)

Publication Number Publication Date
KR960023266A true KR960023266A (en) 1996-07-18
KR0136996B1 KR0136996B1 (en) 1998-04-25

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101154133B1 (en) * 2008-08-29 2012-06-13 실리콘 제너시스 코포레이션 Free-standing thickness of single crystal material and method having carrier lifetimes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101154133B1 (en) * 2008-08-29 2012-06-13 실리콘 제너시스 코포레이션 Free-standing thickness of single crystal material and method having carrier lifetimes

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Publication number Publication date
KR0136996B1 (en) 1998-04-25

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