KR960015232A - Memory device with the function of cache memory - Google Patents

Memory device with the function of cache memory Download PDF

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Publication number
KR960015232A
KR960015232A KR1019940027206A KR19940027206A KR960015232A KR 960015232 A KR960015232 A KR 960015232A KR 1019940027206 A KR1019940027206 A KR 1019940027206A KR 19940027206 A KR19940027206 A KR 19940027206A KR 960015232 A KR960015232 A KR 960015232A
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KR
South Korea
Prior art keywords
data
output
memory
input
memory device
Prior art date
Application number
KR1019940027206A
Other languages
Korean (ko)
Other versions
KR970010369B1 (en
Inventor
안승한
이재진
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940027206A priority Critical patent/KR970010369B1/en
Priority to CN95119195A priority patent/CN1087473C/en
Priority to US08/548,212 priority patent/US5719810A/en
Publication of KR960015232A publication Critical patent/KR960015232A/en
Application granted granted Critical
Publication of KR970010369B1 publication Critical patent/KR970010369B1/en

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/004—Error avoidance
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Static Random-Access Memory (AREA)

Abstract

본 발명은 반도체 기억소자에 저장된 데이타를 소자 외부로 출력하는 출력버퍼(output buffer)에 관한 것으로 입력 데이타를 일시적으로 저장할 수 있는 데이타 레지스터를 구현하여 상기 입력 데이타를 컬럼 어드레스(column address)의 변화없이 직접 출력할 수 있도록 함으로써 패스터 페이지 모드에서 라이트 동작 이후에 리드 동작이 수행되는 경우에 컬럼 어드레스의 변화 없이 일시적으로 데이타가 저장된 데이타 레지스터에서 데이타를 출력하기 때문에 데이타 출력속도가 빠르고, 또한 결함 데이터가 생기는 것을 방지할 수 있다.The present invention relates to an output buffer for outputting data stored in a semiconductor memory device to an outside of the device. By enabling direct output, when the read operation is performed after the write operation in the fastener page mode, the data output speed is high because the data is temporarily output from the data register where the data is stored without changing the column address. It can be prevented from occurring.

Description

캐시 메모리의 기능을 갖는 메모리 장치Memory device with the function of cache memory

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 의한 출력버퍼 및 입력버퍼의 실시예도.2 is an embodiment of the output buffer and the input buffer according to the present invention.

Claims (2)

입력신호를 셀 어레이 블럭에 저장하는 셀 메모리부와, 상기 셀 메모리부에 저장된 데이타를 소자의 외부로 출력하기 위한 출력 버퍼수단과, 상기 출력 버퍼수단으로 부터의 완충된 신호를 출력하기 위한 출력단자와, 상기 출력버퍼수단으로 부터의 완충된 신호를 상기 셀 메모리부에 입력하기 위한 입력 버퍼수단과, 상기 입력 버퍼수단으로부터의 완충된 입력신호를 일시적으로 저장하기 위한 데이타 레지스터부와, 상기 셀 메모리부, 데이타 레지스터부 및 출력 버퍼수단 사이에 접속되며, 상기 셀 메모리부 및 상기 데이타 레지스터부로 부터의 완충된 데이타 신호를 입력으로 하여 하나의 출력단자로 절환시키기 위한 멀티플렉스 수단을 구비하는 것을 특징으로 하는 메모리 장치.A cell memory unit for storing an input signal in a cell array block, an output buffer unit for outputting data stored in the cell memory unit to the outside of the device, and an output terminal for outputting a buffered signal from the output buffer unit An input buffer means for inputting a buffered signal from said output buffer means to said cell memory portion, a data register portion for temporarily storing a buffered input signal from said input buffer means, and said cell memory And a multiplexing means connected between the data register section and the output buffer means for converting a buffered data signal from the cell memory section and the data register section into one output terminal. Memory device. 제1항에 있어서, 상기 메모리 장치는, 제1의 동작에서는 소자의 내부에서 출력되는 리드 데이타를 출력버퍼부로 보내고, 제2의 동작에서는 데이타 입력장치를 통하여 입력된 데이타를 어드레스의 변화없이 직접 출력 버퍼부로 보내는 것을 특징으로 하는 메모리 장치.The memory device of claim 1, wherein the memory device sends read data output from the inside of the device to an output buffer unit in a first operation, and directly outputs data input through the data input device without changing an address in a second operation. And a memory device which is sent to the buffer unit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940027206A 1994-10-25 1994-10-25 Memory apparatus having the function of cache memory KR970010369B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019940027206A KR970010369B1 (en) 1994-10-25 1994-10-25 Memory apparatus having the function of cache memory
CN95119195A CN1087473C (en) 1994-10-25 1995-10-25 Semiconductor memory device having cache memory function
US08/548,212 US5719810A (en) 1994-10-25 1995-10-25 Semiconductor memory device having cache memory function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940027206A KR970010369B1 (en) 1994-10-25 1994-10-25 Memory apparatus having the function of cache memory

Publications (2)

Publication Number Publication Date
KR960015232A true KR960015232A (en) 1996-05-22
KR970010369B1 KR970010369B1 (en) 1997-06-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940027206A KR970010369B1 (en) 1994-10-25 1994-10-25 Memory apparatus having the function of cache memory

Country Status (1)

Country Link
KR (1) KR970010369B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100351995B1 (en) * 2001-03-12 2002-09-11 신한기연주식회사 Electro polishing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100351995B1 (en) * 2001-03-12 2002-09-11 신한기연주식회사 Electro polishing device

Also Published As

Publication number Publication date
KR970010369B1 (en) 1997-06-25

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