KR960012475A - 유전 영역 상의 전하 형성 방지 장치 - Google Patents
유전 영역 상의 전하 형성 방지 장치Info
- Publication number
- KR960012475A KR960012475A KR1019950029646A KR19950029646A KR960012475A KR 960012475 A KR960012475 A KR 960012475A KR 1019950029646 A KR1019950029646 A KR 1019950029646A KR 19950029646 A KR19950029646 A KR 19950029646A KR 960012475 A KR960012475 A KR 960012475A
- Authority
- KR
- South Korea
- Prior art keywords
- dielectric regions
- charge build
- prevents charge
- prevents
- build
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US30522994A | 1994-09-13 | 1994-09-13 | |
US08/305,229 | 1994-09-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960012475A true KR960012475A (ko) | 1996-04-20 |
KR100372905B1 KR100372905B1 (ko) | 2003-05-01 |
Family
ID=23179906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950029646A KR100372905B1 (ko) | 1994-09-13 | 1995-09-12 | 산화물영역보호장치 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5760445A (ko) |
JP (1) | JPH08181284A (ko) |
KR (1) | KR100372905B1 (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8605911B2 (en) | 2001-07-10 | 2013-12-10 | Dolby International Ab | Efficient and scalable parametric stereo coding for low bitrate audio coding applications |
US9761236B2 (en) | 2001-11-29 | 2017-09-12 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
Families Citing this family (66)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5691234A (en) * | 1995-08-03 | 1997-11-25 | United Microelectronics Corporation | Buried contact method to release plasma-induced charging damage on device |
US5793069A (en) * | 1996-06-28 | 1998-08-11 | Intel Corporation | Apparatus for protecting gate electrodes of target transistors in a gate array from gate charging by employing free transistors in the gate array |
US6432726B2 (en) * | 1997-03-31 | 2002-08-13 | Artisan Components, Inc. | Method and apparatus for reducing process-induced charge buildup |
IL125604A (en) * | 1997-07-30 | 2004-03-28 | Saifun Semiconductors Ltd | Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge |
US6768165B1 (en) * | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
JP3221369B2 (ja) | 1997-09-19 | 2001-10-22 | 日本電気株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
JP3926011B2 (ja) * | 1997-12-24 | 2007-06-06 | 株式会社ルネサステクノロジ | 半導体装置の設計方法 |
US6091114A (en) * | 1998-03-31 | 2000-07-18 | Texas Instruments Incorporated | Method and apparatus for protecting gate oxide from process-induced charging effects |
US6215148B1 (en) | 1998-05-20 | 2001-04-10 | Saifun Semiconductors Ltd. | NROM cell with improved programming, erasing and cycling |
US6348711B1 (en) | 1998-05-20 | 2002-02-19 | Saifun Semiconductors Ltd. | NROM cell with self-aligned programming and erasure areas |
JP3186701B2 (ja) * | 1998-07-13 | 2001-07-11 | 日本電気株式会社 | 半導体装置 |
US6211051B1 (en) | 1999-04-14 | 2001-04-03 | Lsi Logic Corporation | Reduction of plasma damage at contact etch in MOS integrated circuits |
US6433403B1 (en) | 1999-04-21 | 2002-08-13 | Micron Technology, Inc. | Integrated circuit having temporary conductive path structure and method for forming the same |
US6524872B1 (en) | 1999-05-24 | 2003-02-25 | Agere Systems Inc. | Using fast hot-carrier aging method for measuring plasma charging damage |
US6337502B1 (en) | 1999-06-18 | 2002-01-08 | Saifun Semicinductors Ltd. | Method and circuit for minimizing the charging effect during manufacture of semiconductor devices |
US6303510B1 (en) | 1999-06-21 | 2001-10-16 | Taiwan Semiconductor Manufacturing Company | Plasma etch method with attenuated patterned layer charging |
US6277723B1 (en) | 1999-10-14 | 2001-08-21 | Taiwan Semiconductor Manufacturing Company | Plasma damage protection cell using floating N/P/N and P/N/P structure |
US6429063B1 (en) | 1999-10-26 | 2002-08-06 | Saifun Semiconductors Ltd. | NROM cell with generally decoupled primary and secondary injection |
US6490204B2 (en) | 2000-05-04 | 2002-12-03 | Saifun Semiconductors Ltd. | Programming and erasing methods for a reference cell of an NROM array |
US6396741B1 (en) | 2000-05-04 | 2002-05-28 | Saifun Semiconductors Ltd. | Programming of nonvolatile memory cells |
JP2002141421A (ja) | 2000-10-31 | 2002-05-17 | Toshiba Corp | 半導体集積回路装置 |
JP4676116B2 (ja) * | 2000-11-01 | 2011-04-27 | セイコーインスツル株式会社 | 半導体装置 |
US6584017B2 (en) | 2001-04-05 | 2003-06-24 | Saifun Semiconductors Ltd. | Method for programming a reference cell |
US6979868B2 (en) * | 2001-04-18 | 2005-12-27 | United Microelectronics Corp. | Bypass circuits for reducing plasma damage |
US6686254B2 (en) * | 2001-04-27 | 2004-02-03 | Motorola, Inc. | Semiconductor structure and method for reducing charge damage |
JP2003100899A (ja) * | 2001-09-27 | 2003-04-04 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US6885078B2 (en) * | 2001-11-09 | 2005-04-26 | Lsi Logic Corporation | Circuit isolation utilizing MeV implantation |
US7098107B2 (en) | 2001-11-19 | 2006-08-29 | Saifun Semiconductor Ltd. | Protective layer in memory device and method therefor |
US6583007B1 (en) | 2001-12-20 | 2003-06-24 | Saifun Semiconductors Ltd. | Reducing secondary injection effects |
US6934136B2 (en) * | 2002-04-24 | 2005-08-23 | Texas Instrument Incorporated | ESD protection of noise decoupling capacitors |
KR100444492B1 (ko) * | 2002-05-16 | 2004-08-16 | 주식회사 하이닉스반도체 | 반도체소자의 제조 방법 |
US6917544B2 (en) | 2002-07-10 | 2005-07-12 | Saifun Semiconductors Ltd. | Multiple use memory chip |
US7196369B2 (en) * | 2002-07-15 | 2007-03-27 | Macronix International Co., Ltd. | Plasma damage protection circuit for a semiconductor device |
US6826107B2 (en) * | 2002-08-01 | 2004-11-30 | Saifun Semiconductors Ltd. | High voltage insertion in flash memory cards |
US7136304B2 (en) | 2002-10-29 | 2006-11-14 | Saifun Semiconductor Ltd | Method, system and circuit for programming a non-volatile memory array |
US7178004B2 (en) | 2003-01-31 | 2007-02-13 | Yan Polansky | Memory array programming circuit and a method for using the circuit |
US7033900B1 (en) * | 2003-03-27 | 2006-04-25 | Cypress Semiconductor Corporation | Protection of integrated circuit gates during metallization processes |
US7142464B2 (en) * | 2003-04-29 | 2006-11-28 | Saifun Semiconductors Ltd. | Apparatus and methods for multi-level sensing in a memory array |
JP4821086B2 (ja) * | 2003-10-31 | 2011-11-24 | 富士電機株式会社 | 半導体装置 |
US7178126B2 (en) * | 2004-01-21 | 2007-02-13 | Oki Electric Industry Co., Ltd. | Method of protecting a semiconductor integrated circuit from plasma damage |
US7638850B2 (en) | 2004-10-14 | 2009-12-29 | Saifun Semiconductors Ltd. | Non-volatile memory structure and method of fabrication |
JP4507091B2 (ja) * | 2004-12-13 | 2010-07-21 | エルピーダメモリ株式会社 | 半導体装置の製造方法及び半導体装置 |
US7170816B2 (en) * | 2004-12-16 | 2007-01-30 | Macronix International Co., Ltd. | Method and apparatus for passing charge from word lines during manufacture |
US20060145263A1 (en) * | 2005-01-06 | 2006-07-06 | Macronix International Co., Ltd. | Plasma damage protection circuit for protecting multiple word lines or strapped word lines of a memory device |
US7116606B2 (en) * | 2005-01-14 | 2006-10-03 | Macronix International Co., Ltd. | Method and circuit of plasma damage protection |
US8053812B2 (en) * | 2005-03-17 | 2011-11-08 | Spansion Israel Ltd | Contact in planar NROM technology |
EP1746645A3 (en) | 2005-07-18 | 2009-01-21 | Saifun Semiconductors Ltd. | Memory array with sub-minimum feature size word line spacing and method of fabrication |
US7668017B2 (en) | 2005-08-17 | 2010-02-23 | Saifun Semiconductors Ltd. | Method of erasing non-volatile memory cells |
DE102005044124B4 (de) * | 2005-09-15 | 2010-11-25 | Texas Instruments Deutschland Gmbh | Verfahren zur Herstellung einer integrierten Schaltung mit Gate-Selbstschutz, und integrierte Schaltung mit Gate-Selbstschutz |
WO2007035416A2 (en) * | 2005-09-15 | 2007-03-29 | Texas Instruments Incorporated | Integrated circuit with gate self-protection |
US7221138B2 (en) * | 2005-09-27 | 2007-05-22 | Saifun Semiconductors Ltd | Method and apparatus for measuring charge pump output current |
US20070087503A1 (en) * | 2005-10-17 | 2007-04-19 | Saifun Semiconductors, Ltd. | Improving NROM device characteristics using adjusted gate work function |
US7808818B2 (en) | 2006-01-12 | 2010-10-05 | Saifun Semiconductors Ltd. | Secondary injection for NROM |
US7692961B2 (en) | 2006-02-21 | 2010-04-06 | Saifun Semiconductors Ltd. | Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection |
US8253452B2 (en) | 2006-02-21 | 2012-08-28 | Spansion Israel Ltd | Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same |
US7760554B2 (en) | 2006-02-21 | 2010-07-20 | Saifun Semiconductors Ltd. | NROM non-volatile memory and mode of operation |
US7638835B2 (en) * | 2006-02-28 | 2009-12-29 | Saifun Semiconductors Ltd. | Double density NROM with nitride strips (DDNS) |
US7492016B2 (en) * | 2006-03-31 | 2009-02-17 | International Business Machines Corporation | Protection against charging damage in hybrid orientation transistors |
US7701779B2 (en) | 2006-04-27 | 2010-04-20 | Sajfun Semiconductors Ltd. | Method for programming a reference cell |
JP4570662B2 (ja) * | 2008-01-16 | 2010-10-27 | Okiセミコンダクタ株式会社 | デジタル・アナログ変換器 |
US7846800B2 (en) * | 2008-03-06 | 2010-12-07 | Chartered Semiconductor Manufacturing, Ltd. | Avoiding plasma charging in integrated circuits |
US8541845B2 (en) * | 2011-01-11 | 2013-09-24 | Infineon Technologies Ag | Semiconductor discharge devices and methods of formation thereof |
US9082617B2 (en) * | 2013-12-17 | 2015-07-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit and fabricating method thereof |
US9490249B2 (en) | 2014-04-30 | 2016-11-08 | Macronix International Co., Ltd. | Antenna effect discharge circuit and manufacturing method |
US9490245B1 (en) * | 2015-06-19 | 2016-11-08 | Qualcomm Incorporated | Circuit and layout for a high density antenna protection diode |
US9659979B2 (en) * | 2015-10-15 | 2017-05-23 | International Business Machines Corporation | Sensors including complementary lateral bipolar junction transistors |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4400711A (en) * | 1981-03-31 | 1983-08-23 | Rca Corporation | Integrated circuit protection device |
US4609931A (en) * | 1981-07-17 | 1986-09-02 | Tokyo Shibaura Denki Kabushiki Kaisha | Input protection MOS semiconductor device with zener breakdown mechanism |
US4786956A (en) * | 1982-10-20 | 1988-11-22 | North American Philips Corporation, Signetics Division | Input protection device for integrated circuits |
JPH02119262A (ja) * | 1988-10-28 | 1990-05-07 | Toshiba Corp | 半導体装置 |
US5436183A (en) * | 1990-04-17 | 1995-07-25 | National Semiconductor Corporation | Electrostatic discharge protection transistor element fabrication process |
-
1995
- 1995-09-12 KR KR1019950029646A patent/KR100372905B1/ko not_active IP Right Cessation
- 1995-09-12 JP JP7259290A patent/JPH08181284A/ja active Pending
-
1997
- 1997-03-20 US US08/822,365 patent/US5760445A/en not_active Expired - Lifetime
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8605911B2 (en) | 2001-07-10 | 2013-12-10 | Dolby International Ab | Efficient and scalable parametric stereo coding for low bitrate audio coding applications |
US9792919B2 (en) | 2001-07-10 | 2017-10-17 | Dolby International Ab | Efficient and scalable parametric stereo coding for low bitrate applications |
US9799340B2 (en) | 2001-07-10 | 2017-10-24 | Dolby International Ab | Efficient and scalable parametric stereo coding for low bitrate audio coding applications |
US9799341B2 (en) | 2001-07-10 | 2017-10-24 | Dolby International Ab | Efficient and scalable parametric stereo coding for low bitrate applications |
US9865271B2 (en) | 2001-07-10 | 2018-01-09 | Dolby International Ab | Efficient and scalable parametric stereo coding for low bitrate applications |
US9761236B2 (en) | 2001-11-29 | 2017-09-12 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
US9761237B2 (en) | 2001-11-29 | 2017-09-12 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
US9761234B2 (en) | 2001-11-29 | 2017-09-12 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
US9779746B2 (en) | 2001-11-29 | 2017-10-03 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
US9792923B2 (en) | 2001-11-29 | 2017-10-17 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
US9812142B2 (en) | 2001-11-29 | 2017-11-07 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
US9818418B2 (en) | 2001-11-29 | 2017-11-14 | Dolby International Ab | High frequency regeneration of an audio signal with synthetic sinusoid addition |
Also Published As
Publication number | Publication date |
---|---|
US5760445A (en) | 1998-06-02 |
JPH08181284A (ja) | 1996-07-12 |
KR100372905B1 (ko) | 2003-05-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
N231 | Notification of change of applicant | ||
N231 | Notification of change of applicant | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20100204 Year of fee payment: 8 |
|
LAPS | Lapse due to unpaid annual fee |