KR960012350A - Dry etching method, semiconductor device manufacturing method and liquid crystal display device manufacturing method - Google Patents

Dry etching method, semiconductor device manufacturing method and liquid crystal display device manufacturing method Download PDF

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Publication number
KR960012350A
KR960012350A KR1019950032075A KR19950032075A KR960012350A KR 960012350 A KR960012350 A KR 960012350A KR 1019950032075 A KR1019950032075 A KR 1019950032075A KR 19950032075 A KR19950032075 A KR 19950032075A KR 960012350 A KR960012350 A KR 960012350A
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South Korea
Prior art keywords
etching
gas
film
transparent electrode
semiconductor device
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KR1019950032075A
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Korean (ko)
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고지 스즈끼
가오루 다께다
요시히로 모리모또
기요시 요네다
Original Assignee
다까노 야스아끼
상요덴기 가부시끼가이샤
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Publication of KR960012350A publication Critical patent/KR960012350A/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Abstract

제1에칭 가스를 이용하여 투명 전극막을 반응성 이온 에칭법으로 에칭하는 공정과, 제1에칭 가스를 제2에칭 가스로 전환하여 투명 전극막을 반응성 이온 에칭법으로 에칭하는 공정을 구비하고, 제2에칭 가스로서 염소계 가스를 이용하는 건식 에칭 방법.And etching the transparent electrode film by the reactive ion etching method using the first etching gas, and converting the first etching gas into the second etching gas and etching the transparent electrode film by the reactive ion etching method. Dry etching method using a chlorine-based gas as a gas.

Description

건식 에칭 방법, 반도체 장치의 제조 방법 및 액정 표시 장치의 제조 방법Dry etching method, semiconductor device manufacturing method and liquid crystal display device manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 건식 에칭 방법의 일실시 형태를 도시한 단면도,1 is a cross-sectional view showing an embodiment of the dry etching method of the present invention;

제2도는 제1도의 도시한 에칭 공정에 따라 투명 전극막을 화소 전극의 형상으로 에칭한 상태를 도시한 단면도.FIG. 2 is a cross-sectional view showing a state in which the transparent electrode film is etched in the shape of a pixel electrode according to the etching process shown in FIG.

Claims (18)

제1에칭 가스를 이용하여 투명 전극막을 반응성 이온 에칭법으로 에칭하는 공정 및 상기 제1에칭 가스를 제2에칭 가스로 전환하여 상기 투명 전극막을 반응성 이온 에칭법으로 에칭하는 공정을 구비하고, 상기 제2에칭 가스로서 염소계 가스가 이용되는 것을 특징으로 하는 건식 에칭 방법.Etching the transparent electrode film by a reactive ion etching method using a first etching gas, and converting the first etching gas into a second etching gas and etching the transparent electrode film by a reactive ion etching method, A chlorine-based gas is used as a two etching gas. 제1항에 있어서, 상기 제2에칭 가스에 의한 에칭 공정이 에칭 완료까지 에칭하는 공정인 것을 특징으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein the etching step by the second etching gas is a step of etching until etching is completed. 제1항에 있어서, 상기 제1에칭 가스로서 브롬화 수소(HBr)을 포함하는 가스가 이용되는 것을 특징으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein a gas containing hydrogen bromide (HBr) is used as the first etching gas. 제1항에 있어서, 상기 제1에칭 가스로서 요오드화 수소(HI)을 포함하는 가스가 이용되는 것을 특징으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein a gas containing hydrogen iodide (HI) is used as the first etching gas. 제1항에 있어서, 상기 염소계 가스가 Cl2가스, BCl3가스 또는 이들 혼합 가스인 것을 특징으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein the chlorine-based gas is Cl 2 gas, BCl 3 gas, or a mixed gas thereof. 제1항에 있어서, 상기 투명 전극막이 In2O3를 포함하는 막인 것을 특징으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein the transparent electrode film is a film containing In 2 O 3 . 제1항에 있어서, 상기 투명 전극이 ITO막인 것을 특징으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein the transparent electrode is an ITO film. 제1항에 있어서, 상기 투명 전극막 위에 패턴화된 레지스트막이 설치되어 있고, 레지스트막이 설치되어 있지 않은 투명 전극막 영역이 에칭되는 것을 특지으로 하는 건식 에칭 방법.The dry etching method according to claim 1, wherein a patterned resist film is provided on the transparent electrode film, and a transparent electrode film region on which the resist film is not provided is etched. 전극부를 갖는 반도체 스위칭 소자를 형성하는 공정, 상기 반도체 스위칭 소자 위에 절연막을 형성하는 공정, 상기 절연막에 상기 반도체 스위칭 소자의 상기 전극부와 전기적인 도통을 형성하기 위한 콘택트 홀을 형성하는 공정, 상기 콘택트 홀 내 및 상기 절연막 위에 투명 전극막을 형성하는 공정, 상기 투명 전극막 위에 패턴화된 레지스트막을 형성하는 공정, 상기 레지스트막이 설치되어 있지 않은 상기 투명 전극막의 영역을 제1에칭 가스를 이용하여 반응성 이온 에칭방법으로 에칭하는 공정 및 상기 제1에칭 가스를 제2에칭 가스인 염소계 가스로 전환하여 상기 투명 전극막의 상기 영역을 반응성 이온 에칭법으로 에칭하는 공정을 구비한 것을 특징으로 하는 반도체 장치의 제조 방법.Forming a semiconductor switching element having an electrode portion, forming an insulating film on the semiconductor switching element, forming a contact hole in the insulating film for forming electrical conduction with the electrode portion of the semiconductor switching element, the contact Forming a transparent electrode film in the hole and on the insulating film, forming a patterned resist film on the transparent electrode film, and reactive ion etching a region of the transparent electrode film on which the resist film is not provided using a first etching gas And a step of converting the first etching gas into a chlorine-based gas, which is a second etching gas, to etch the region of the transparent electrode film by a reactive ion etching method. 제9항에 있어서, 상기 제2에칭 가스에 의한 에칭 공정이 에칭 완료까지 에칭하는 공정인 것을 특징으로 하는 반도체 장치의 제조 방법.The method of manufacturing a semiconductor device according to claim 9, wherein the etching step by the second etching gas is a step of etching until etching is completed. 제9항에 있어서, 상기 제1에칭 가스로서 브롬화 수소(HBr)을 포함하는 가스가 이용되는 것을 특징으로 하는 반도체 장치의 제조 방법.10. The method of manufacturing a semiconductor device according to claim 9, wherein a gas containing hydrogen bromide (HBr) is used as the first etching gas. 제9항에 있어서, 상기 제1에칭 가스로서 요오드화 수소(HI)을 포함하는 가스가 이용되는 것을 특징으로 하는 반도체 장치의 제조 방법.10. The method of manufacturing a semiconductor device according to claim 9, wherein a gas containing hydrogen iodide (HI) is used as said first etching gas. 제9항에 있어서, 상기 염소계 가스가 Cl2가스, BCl3가스 또는 이들 혼합 가스인 것을 특징으로 하는 반도체 장치의 제조 방법.The method of manufacturing a semiconductor device according to claim 9, wherein the chlorine-based gas is Cl 2 gas, BCl 3 gas, or a mixed gas thereof. 제9항에 있어서, 상기 투명 전극막이 In2O3를 포함하는 막인 것을 특징으로 하는 반도체 장치의 제조 방법.The method of manufacturing a semiconductor device according to claim 9, wherein the transparent electrode film is a film containing In 2 O 3 . 제9항에 있어서, 상기 투명 전극이 ITO막인 것을 특징으로 하는 반도체 장치 방법.The semiconductor device method according to claim 9, wherein the transparent electrode is an ITO film. 제9항에 있어서, 상기 반도체 스위칭 소자가 박막 트랜지스터 또는 MIM소자인 것을 특징으로 하는 반도체 장치의 제조 방법.The method of manufacturing a semiconductor device according to claim 9, wherein said semiconductor switching element is a thin film transistor or a MIM element. 제9항에 있어서, 반도체 장치가 액정 표시 장치의 화소 구동부인 것을 특징으로 하는 반도체 장치의 제조 방법.The method of manufacturing a semiconductor device according to claim 9, wherein the semiconductor device is a pixel driver of a liquid crystal display device. 전극부를 갖는 화소를 구동하기 위한 반도체 스위칭 소자를 형성하는 공정, 상기 반도체 스위칭 소자 위에 절연막을 형성하는 공정, 상기 절연막에 상기 반도체 스위칭 소자의 상기 전극부와 전기적인 도통을 형성하기 위한 콘택트 홀을 형성하는 공정, 상기 콘택트 홀 내 및 상기 절연막 위에 투명 전극막을 형성하는 공정, 상기 투명 전극막을 화소 전극의 형상으로 패턴하기 위해 상기 투명 전극막 위에 패턴화된 레지스트막을 형성하는 공정, 상기 레지스트막이 설치되어 있지 않은 상기 투명 전극막의 영역을 제1에칭 가스를 이용하여 반응성 이온 에칭방법으로 에칭하는 공정 및 상기 제1에칭 가스를 제2에칭 가스인 염소계 가스로 전환하여 상기 투명 전극막의 상기 영역을 반응성 이온 에칭법으로 에칭며, 상기 투명 전극을 화소 전극의 형상으로 하는 공정을 구비한 것을 특징으로 하는 반도체 장치의 제조 방법.Forming a semiconductor switching element for driving a pixel having an electrode portion, forming an insulating film on the semiconductor switching element, and forming a contact hole in the insulating film for forming electrical conduction with the electrode portion of the semiconductor switching element Forming a transparent electrode film in the contact hole and on the insulating film; forming a patterned resist film on the transparent electrode film to pattern the transparent electrode film in the shape of a pixel electrode; and the resist film is not provided. And etching the region of the transparent electrode film by a reactive ion etching method using a first etching gas, and converting the first etching gas into a chlorine-based gas which is a second etching gas to convert the region of the transparent electrode film into a reactive ion etching method. Etching to lower the transparent electrode into the shape of a pixel electrode. The process is a manufacturing method of the semiconductor device characterized by the above-mentioned. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950032075A 1994-09-28 1995-09-27 Dry etching method, semiconductor device manufacturing method and liquid crystal display device manufacturing method KR960012350A (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP94-233474 1994-09-28
JP23347494 1994-09-28
JP16751495 1995-07-03
JP95-167514 1995-07-03
JP95-249467 1995-09-27
JP7249467A JP3054584B2 (en) 1994-09-28 1995-09-27 Dry etching method, semiconductor device manufacturing method, and liquid crystal display device manufacturing method

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KR960012350A true KR960012350A (en) 1996-04-20

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JP4524223B2 (en) * 2004-07-16 2010-08-11 富士フイルム株式会社 Functional device and method for manufacturing the same, solid-state imaging device and method for manufacturing the same
EP1995787A3 (en) 2005-09-29 2012-01-18 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device having oxide semiconductor layer and manufacturing method therof

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JP3054584B2 (en) 2000-06-19

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